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sunxi: add support for Orange Pi Zero 3
Key features: Allwinner H618 SoC (Quad core Cortex-A53) 1/1.5/2/4 GiB LPDDR4 DRAM 1 USB 2.0 type C port (Power + OTG) 1 USB 2.0 host port 1Gbps Ethernet port Micro-HDMI port MicroSD slot Installation: Write the image to SD Card with dd. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
This commit is contained in:
parent
85b156c113
commit
29b8ba75fa
@ -339,6 +339,15 @@ define U-Boot/orangepi_zero2
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ATF:=h616
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endef
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define U-Boot/orangepi_zero3
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BUILD_SUBTARGET:=cortexa53
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NAME:=Xunlong Orange Pi Zero3
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BUILD_DEVICES:=xunlong_orangepi-zero3
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DEPENDS:=+PACKAGE_u-boot-orangepi_zero3:trusted-firmware-a-sunxi-h616
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UENV:=h616
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ATF:=h616
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endef
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define U-Boot/Bananapi_M2_Ultra
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BUILD_SUBTARGET:=cortexa7
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NAME:=Bananapi M2 Ultra
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@ -402,6 +411,7 @@ UBOOT_TARGETS := \
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orangepi_2 \
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orangepi_pc2 \
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orangepi_zero2 \
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orangepi_zero3 \
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pangolin \
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pine64_plus \
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Sinovoip_BPI_M3 \
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@ -54,6 +54,7 @@ CONFIG_MDIO_BUS_MUX=y
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CONFIG_MICREL_PHY=y
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# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
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CONFIG_MODULES_USE_ELF_RELA=y
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CONFIG_MOTORCOMM_PHY=y
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CONFIG_MUSB_PIO_ONLY=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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CONFIG_NOP_USB_XCEIV=y
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@ -29,6 +29,11 @@ define Device/sun50i-h616
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$(Device/sun50i)
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endef
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define Device/sun50i-h618
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SOC := sun50i-h618
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$(Device/sun50i)
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endef
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define Device/friendlyarm_nanopi-neo-plus2
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DEVICE_VENDOR := FriendlyARM
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DEVICE_MODEL := NanoPi NEO Plus2
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@ -120,6 +125,13 @@ define Device/xunlong_orangepi-zero2
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endef
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TARGET_DEVICES += xunlong_orangepi-zero2
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define Device/xunlong_orangepi-zero3
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DEVICE_VENDOR := Xunlong
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DEVICE_MODEL := Orange Pi Zero 3
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$(Device/sun50i-h618)
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endef
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TARGET_DEVICES += xunlong_orangepi-zero3
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define Device/xunlong_orangepi-zero-plus
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DEVICE_VENDOR := Xunlong
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DEVICE_MODEL := Orange Pi Zero Plus
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@ -0,0 +1,305 @@
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From 322bf103204b8f786547acbeed85569254e7088f Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Fri, 4 Aug 2023 18:08:54 +0100
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Subject: [PATCH] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT
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The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some
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DT nodes with the Zero 2, but comes with a different PMIC.
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Move the common parts (except the PMIC) into a new shared file, and
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include that from the existing board .dts file.
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No functional change, the generated DTB is the same, except for some
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phandle numbering differences.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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---
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.../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++
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.../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +---------------
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2 files changed, 135 insertions(+), 118 deletions(-)
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create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
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@@ -0,0 +1,134 @@
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+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+/*
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+ * Copyright (C) 2020 Arm Ltd.
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+ *
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+ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3.
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+ * Excludes PMIC nodes and properties, since they are different between the two.
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+ */
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+
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+#include "sun50i-h616.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/leds/common.h>
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+
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+/ {
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+ aliases {
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+ ethernet0 = &emac0;
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led-0 {
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+ function = LED_FUNCTION_POWER;
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+ color = <LED_COLOR_ID_RED>;
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+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
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+ default-state = "on";
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+ };
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+
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+ led-1 {
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+ function = LED_FUNCTION_STATUS;
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+ color = <LED_COLOR_ID_GREEN>;
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+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
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+ };
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+ };
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+
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+ reg_vcc5v: vcc5v {
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+ /* board wide 5V supply directly from the USB-C socket */
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-5v";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_usb1_vbus: regulator-usb1-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb1-vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <®_vcc5v>;
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+ enable-active-high;
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+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
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+ };
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+};
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+
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+&ehci1 {
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+ status = "okay";
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+};
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+
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+/* USB 2 & 3 are on headers only. */
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+
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+&emac0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ext_rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ allwinner,rx-delay-ps = <3100>;
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+ allwinner,tx-delay-ps = <700>;
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+ status = "okay";
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+};
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+
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+&mdio0 {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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+&mmc0 {
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ bus-width = <4>;
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+ status = "okay";
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+};
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+
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+&ohci1 {
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+ status = "okay";
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+};
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+
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+&spi0 {
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+ status = "okay";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
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+
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <40000000>;
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+ };
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ph_pins>;
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+ status = "okay";
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+};
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+
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+&usbotg {
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+ /*
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+ * PHY0 pins are connected to a USB-C socket, but a role switch
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+ * is not implemented: both CC pins are pulled to GND.
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+ * The VBUS pins power the device, so a fixed peripheral mode
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+ * is the best choice.
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+ * The board can be powered via GPIOs, in this case port0 *can*
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+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
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+ * then provided by the GPIOs. Any user of this setup would
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+ * need to adjust the DT accordingly: dr_mode set to "host",
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+ * enabling OHCI0 and EHCI0.
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+ */
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+ dr_mode = "peripheral";
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ usb1_vbus-supply = <®_usb1_vbus>;
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+ status = "okay";
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+};
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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@@ -5,95 +5,19 @@
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/dts-v1/;
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-#include "sun50i-h616.dtsi"
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-
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-#include <dt-bindings/gpio/gpio.h>
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-#include <dt-bindings/interrupt-controller/arm-gic.h>
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-#include <dt-bindings/leds/common.h>
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+#include "sun50i-h616-orangepi-zero.dtsi"
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/ {
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model = "OrangePi Zero2";
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compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
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-
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- aliases {
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- ethernet0 = &emac0;
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- serial0 = &uart0;
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- };
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-
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- chosen {
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- stdout-path = "serial0:115200n8";
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- };
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-
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- leds {
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- compatible = "gpio-leds";
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-
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- led-0 {
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- function = LED_FUNCTION_POWER;
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- color = <LED_COLOR_ID_RED>;
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- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
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- default-state = "on";
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- };
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-
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- led-1 {
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- function = LED_FUNCTION_STATUS;
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- color = <LED_COLOR_ID_GREEN>;
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- gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
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- };
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- };
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-
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- reg_vcc5v: vcc5v {
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- /* board wide 5V supply directly from the USB-C socket */
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- compatible = "regulator-fixed";
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- regulator-name = "vcc-5v";
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- regulator-min-microvolt = <5000000>;
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- regulator-max-microvolt = <5000000>;
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- regulator-always-on;
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- };
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-
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- reg_usb1_vbus: regulator-usb1-vbus {
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- compatible = "regulator-fixed";
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- regulator-name = "usb1-vbus";
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- regulator-min-microvolt = <5000000>;
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- regulator-max-microvolt = <5000000>;
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- vin-supply = <®_vcc5v>;
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- enable-active-high;
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- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
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- };
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-};
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-
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-&ehci1 {
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- status = "okay";
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};
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-/* USB 2 & 3 are on headers only. */
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-
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&emac0 {
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- pinctrl-names = "default";
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- pinctrl-0 = <&ext_rgmii_pins>;
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- phy-mode = "rgmii";
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- phy-handle = <&ext_rgmii_phy>;
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phy-supply = <®_dcdce>;
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- allwinner,rx-delay-ps = <3100>;
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- allwinner,tx-delay-ps = <700>;
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- status = "okay";
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-};
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-
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-&mdio0 {
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- ext_rgmii_phy: ethernet-phy@1 {
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- compatible = "ethernet-phy-ieee802.3-c22";
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- reg = <1>;
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- };
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};
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&mmc0 {
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vmmc-supply = <®_dcdce>;
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- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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- bus-width = <4>;
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- status = "okay";
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-};
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-
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-&ohci1 {
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- status = "okay";
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};
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&r_rsb {
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@@ -211,44 +135,3 @@
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vcc-ph-supply = <®_aldo1>;
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vcc-pi-supply = <®_aldo1>;
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};
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-
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-&spi0 {
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- status = "okay";
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- pinctrl-names = "default";
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- pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
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-
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- flash@0 {
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- #address-cells = <1>;
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- #size-cells = <1>;
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- compatible = "jedec,spi-nor";
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- reg = <0>;
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- spi-max-frequency = <40000000>;
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- };
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-};
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-
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-&uart0 {
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- pinctrl-names = "default";
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- pinctrl-0 = <&uart0_ph_pins>;
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- status = "okay";
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-};
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-
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-&usbotg {
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- /*
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- * PHY0 pins are connected to a USB-C socket, but a role switch
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- * is not implemented: both CC pins are pulled to GND.
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- * The VBUS pins power the device, so a fixed peripheral mode
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- * is the best choice.
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- * The board can be powered via GPIOs, in this case port0 *can*
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- * act as a host (with a cable/adapter ignoring CC), as VBUS is
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- * then provided by the GPIOs. Any user of this setup would
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- * need to adjust the DT accordingly: dr_mode set to "host",
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- * enabling OHCI0 and EHCI0.
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- */
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- dr_mode = "peripheral";
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- status = "okay";
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-};
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-
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-&usbphy {
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- usb1_vbus-supply = <®_usb1_vbus>;
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- status = "okay";
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-};
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@ -0,0 +1,140 @@
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From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Fri, 4 Aug 2023 18:08:56 +0100
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Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board
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support
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The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
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which seems to be just an H616 with more L2 cache. The board itself is a
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slightly updated version of the Orange Pi Zero 2. It features:
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- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
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- 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
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- AXP313a PMIC (more capable AXP305 on the Zero2)
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- Raspberry-Pi-1 compatible GPIO header
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- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
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- 1 USB 2.0 host port
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- 1 USB 2.0 type C port (power supply + OTG)
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- MicroSD slot
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- on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
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- 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
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- micro-HDMI port
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- (yet) unsupported Allwinner WiFi/BT chip
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Add the devicetree file describing the currently supported features,
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namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
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the moment, though the basic functionality works.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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---
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arch/arm64/boot/dts/allwinner/Makefile | 1 +
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.../allwinner/sun50i-h618-orangepi-zero3.dts | 94 +++++++++++++++++++
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2 files changed, 95 insertions(+)
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create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
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--- a/arch/arm64/boot/dts/allwinner/Makefile
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+++ b/arch/arm64/boot/dts/allwinner/Makefile
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@@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
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+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
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@@ -0,0 +1,94 @@
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+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+/*
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+ * Copyright (C) 2023 Arm Ltd.
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+ */
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+
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+/dts-v1/;
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+
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+#include "sun50i-h616-orangepi-zero.dtsi"
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+
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+/ {
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+ model = "OrangePi Zero3";
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+ compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
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+};
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+
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||||
+&emac0 {
|
||||
+ phy-supply = <®_dldo1>;
|
||||
+};
|
||||
+
|
||||
+&ext_rgmii_phy {
|
||||
+ motorcomm,clk-out-frequency-hz = <125000000>;
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ /*
|
||||
+ * The schematic shows the card detect pin wired up to PF6, via an
|
||||
+ * inverter, but it just doesn't work.
|
||||
+ */
|
||||
+ broken-cd;
|
||||
+ vmmc-supply = <®_dldo1>;
|
||||
+};
|
||||
+
|
||||
+&r_i2c {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ axp313: pmic@36 {
|
||||
+ compatible = "x-powers,axp313a";
|
||||
+ reg = <0x36>;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ interrupt-controller;
|
||||
+ interrupt-parent = <&pio>;
|
||||
+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
|
||||
+
|
||||
+ vin1-supply = <®_vcc5v>;
|
||||
+ vin2-supply = <®_vcc5v>;
|
||||
+ vin3-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ /* Supplies VCC-PLL, so needs to be always on. */
|
||||
+ reg_aldo1: aldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc1v8";
|
||||
+ };
|
||||
+
|
||||
+ /* Supplies VCC-IO, so needs to be always on. */
|
||||
+ reg_dldo1: dldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc3v3";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc1: dcdc1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <810000>;
|
||||
+ regulator-max-microvolt = <990000>;
|
||||
+ regulator-name = "vdd-gpu-sys";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc2: dcdc2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <810000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-name = "vdd-cpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc3: dcdc3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1100000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-name = "vdd-dram";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ vcc-pc-supply = <®_dldo1>;
|
||||
+ vcc-pf-supply = <®_dldo1>;
|
||||
+ vcc-pg-supply = <®_aldo1>;
|
||||
+ vcc-ph-supply = <®_dldo1>;
|
||||
+ vcc-pi-supply = <®_dldo1>;
|
||||
+};
|
@ -0,0 +1,57 @@
|
||||
From b9622937d95809ef89904583191571a9fa326402 Mon Sep 17 00:00:00 2001
|
||||
From: Chukun Pan <amadeus@jmu.edu.cn>
|
||||
Date: Sun, 29 Oct 2023 15:40:09 +0800
|
||||
Subject: [PATCH] arm64: dts: allwinner: h616: update emac for Orange Pi Zero 3
|
||||
|
||||
The current emac setting is not suitable for Orange Pi Zero 3,
|
||||
move it back to Orange Pi Zero 2 DT. Also update phy mode and
|
||||
delay values for emac on Orange Pi Zero 3.
|
||||
With these changes, Ethernet now looks stable.
|
||||
|
||||
Fixes: 322bf103204b ("arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT")
|
||||
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
|
||||
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Link: https://lore.kernel.org/r/20231029074009.7820-2-amadeus@jmu.edu.cn
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 3 ---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 3 +++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 2 ++
|
||||
3 files changed, 5 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
@@ -68,10 +68,7 @@
|
||||
&emac0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ext_rgmii_pins>;
|
||||
- phy-mode = "rgmii";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
- allwinner,rx-delay-ps = <3100>;
|
||||
- allwinner,tx-delay-ps = <700>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
@@ -13,6 +13,9 @@
|
||||
};
|
||||
|
||||
&emac0 {
|
||||
+ allwinner,rx-delay-ps = <3100>;
|
||||
+ allwinner,tx-delay-ps = <700>;
|
||||
+ phy-mode = "rgmii";
|
||||
phy-supply = <®_dcdce>;
|
||||
};
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
|
||||
@@ -13,6 +13,8 @@
|
||||
};
|
||||
|
||||
&emac0 {
|
||||
+ allwinner,tx-delay-ps = <700>;
|
||||
+ phy-mode = "rgmii-rxid";
|
||||
phy-supply = <®_dldo1>;
|
||||
};
|
||||
|
Loading…
x
Reference in New Issue
Block a user