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kernel: 5.15: update Aquantia PHY driver to v6.1 code
Backport few upstream changes included between v5.15 and v6.1.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 418aadaec9
)
This commit is contained in:
parent
c90901f088
commit
277d97e0d9
@ -0,0 +1,58 @@
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From 12cf1b89a66828719b2135891b65bd5d03eedea9 Mon Sep 17 00:00:00 2001
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From: Bhadram Varka <vbhadram@nvidia.com>
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Date: Tue, 21 Jun 2022 09:10:27 +0530
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Subject: [PATCH] net: phy: Add support for AQR113C EPHY
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Add support multi-gigabit and single-port Ethernet
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PHY transceiver (AQR113C).
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Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
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Link: https://lore.kernel.org/r/20220621034027.56508-1-vbhadram@nvidia.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/aquantia_main.c | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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--- a/drivers/net/phy/aquantia_main.c
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+++ b/drivers/net/phy/aquantia_main.c
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@@ -22,6 +22,7 @@
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#define PHY_ID_AQR107 0x03a1b4e0
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#define PHY_ID_AQCS109 0x03a1b5c2
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#define PHY_ID_AQR405 0x03a1b4b0
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+#define PHY_ID_AQR113C 0x31c31c12
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#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
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@@ -744,6 +745,24 @@ static struct phy_driver aqr_driver[] =
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.handle_interrupt = aqr_handle_interrupt,
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.read_status = aqr_read_status,
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},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C),
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+ .name = "Aquantia AQR113C",
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+ .probe = aqr107_probe,
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+ .config_init = aqr107_config_init,
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+ .config_aneg = aqr_config_aneg,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr107_read_status,
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+ .get_tunable = aqr107_get_tunable,
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+ .set_tunable = aqr107_set_tunable,
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+ .suspend = aqr107_suspend,
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+ .resume = aqr107_resume,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+ .link_change_notify = aqr107_link_change_notify,
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+},
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};
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module_phy_driver(aqr_driver);
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@@ -756,6 +775,7 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
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{ }
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};
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@ -0,0 +1,71 @@
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From 7de26bf144f6a72858ab60afb2bd2b43265ee0ad Mon Sep 17 00:00:00 2001
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From: Sean Anderson <sean.anderson@seco.com>
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Date: Tue, 20 Sep 2022 18:12:34 -0400
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Subject: [PATCH] net: phy: aquantia: Add some additional phy interfaces
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These are documented in the AQR115 register reference. I haven't tested
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them, but perhaps they'll be useful to someone.
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Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/aquantia_main.c | 17 ++++++++++++++++-
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1 file changed, 16 insertions(+), 1 deletion(-)
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--- a/drivers/net/phy/aquantia_main.c
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+++ b/drivers/net/phy/aquantia_main.c
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@@ -27,9 +27,12 @@
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#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
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+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX 1
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI 2
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII 3
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+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI 4
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6
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+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI 7
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10
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#define MDIO_AN_VEND_PROV 0xc400
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@@ -401,15 +404,24 @@ static int aqr107_read_status(struct phy
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case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR:
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phydev->interface = PHY_INTERFACE_MODE_10GKR;
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break;
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+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX:
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+ phydev->interface = PHY_INTERFACE_MODE_1000BASEKX;
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+ break;
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case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI:
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phydev->interface = PHY_INTERFACE_MODE_10GBASER;
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break;
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case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII:
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phydev->interface = PHY_INTERFACE_MODE_USXGMII;
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break;
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+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI:
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+ phydev->interface = PHY_INTERFACE_MODE_XAUI;
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+ break;
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case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII:
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phydev->interface = PHY_INTERFACE_MODE_SGMII;
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break;
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+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI:
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+ phydev->interface = PHY_INTERFACE_MODE_RXAUI;
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+ break;
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case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII:
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phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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break;
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@@ -522,11 +534,14 @@ static int aqr107_config_init(struct phy
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/* Check that the PHY interface type is compatible */
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if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
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+ phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
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phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
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phydev->interface != PHY_INTERFACE_MODE_XGMII &&
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phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
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phydev->interface != PHY_INTERFACE_MODE_10GKR &&
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- phydev->interface != PHY_INTERFACE_MODE_10GBASER)
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+ phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
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+ phydev->interface != PHY_INTERFACE_MODE_XAUI &&
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+ phydev->interface != PHY_INTERFACE_MODE_RXAUI)
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return -ENODEV;
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WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
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@ -0,0 +1,148 @@
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From 3c42563b30417afc8855a3b4c1b38c2f36f78657 Mon Sep 17 00:00:00 2001
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From: Sean Anderson <sean.anderson@seco.com>
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Date: Tue, 20 Sep 2022 18:12:35 -0400
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Subject: [PATCH] net: phy: aquantia: Add support for rate matching
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This adds support for rate matching for phys similar to the AQR107. We
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assume that all phys using aqr107_read_status support rate matching.
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However, it could be possible to determine support based on the firmware
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revision if there are phys discovered which do not support rate
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matching. However, as rate matching is advertised in the datasheets for
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these phys, I suspect it is supported most boards.
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Despite the name, the "config" registers are updated with the current
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rate matching method (if any). Because they appear to be updated
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automatically, I don't know if these registers can be used to disable
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rate matching.
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Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/aquantia_main.c | 51 ++++++++++++++++++++++++++++++---
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1 file changed, 47 insertions(+), 4 deletions(-)
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--- a/drivers/net/phy/aquantia_main.c
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+++ b/drivers/net/phy/aquantia_main.c
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@@ -97,6 +97,19 @@
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#define VEND1_GLOBAL_GEN_STAT2 0xc831
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#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15)
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+/* The following registers all have similar layouts; first the registers... */
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+#define VEND1_GLOBAL_CFG_10M 0x0310
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+#define VEND1_GLOBAL_CFG_100M 0x031b
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+#define VEND1_GLOBAL_CFG_1G 0x031c
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+#define VEND1_GLOBAL_CFG_2_5G 0x031d
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+#define VEND1_GLOBAL_CFG_5G 0x031e
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+#define VEND1_GLOBAL_CFG_10G 0x031f
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+/* ...and now the fields */
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+#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
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+#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0
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+#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1
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+#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2
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+
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#define VEND1_GLOBAL_RSVD_STAT1 0xc885
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#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4)
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#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0)
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@@ -347,40 +360,57 @@ static int aqr_read_status(struct phy_de
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static int aqr107_read_rate(struct phy_device *phydev)
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{
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+ u32 config_reg;
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int val;
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1);
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if (val < 0)
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return val;
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+ if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX)
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+ phydev->duplex = DUPLEX_FULL;
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+ else
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+ phydev->duplex = DUPLEX_HALF;
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+
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switch (FIELD_GET(MDIO_AN_TX_VEND_STATUS1_RATE_MASK, val)) {
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case MDIO_AN_TX_VEND_STATUS1_10BASET:
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phydev->speed = SPEED_10;
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+ config_reg = VEND1_GLOBAL_CFG_10M;
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break;
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case MDIO_AN_TX_VEND_STATUS1_100BASETX:
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phydev->speed = SPEED_100;
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+ config_reg = VEND1_GLOBAL_CFG_100M;
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break;
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case MDIO_AN_TX_VEND_STATUS1_1000BASET:
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phydev->speed = SPEED_1000;
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+ config_reg = VEND1_GLOBAL_CFG_1G;
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break;
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case MDIO_AN_TX_VEND_STATUS1_2500BASET:
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phydev->speed = SPEED_2500;
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+ config_reg = VEND1_GLOBAL_CFG_2_5G;
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break;
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case MDIO_AN_TX_VEND_STATUS1_5000BASET:
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phydev->speed = SPEED_5000;
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+ config_reg = VEND1_GLOBAL_CFG_5G;
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break;
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case MDIO_AN_TX_VEND_STATUS1_10GBASET:
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phydev->speed = SPEED_10000;
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+ config_reg = VEND1_GLOBAL_CFG_10G;
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break;
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default:
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phydev->speed = SPEED_UNKNOWN;
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- break;
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+ return 0;
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}
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- if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX)
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- phydev->duplex = DUPLEX_FULL;
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+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg);
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+ if (val < 0)
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+ return val;
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+
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+ if (FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val) ==
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+ VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE)
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+ phydev->rate_matching = RATE_MATCH_PAUSE;
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else
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- phydev->duplex = DUPLEX_HALF;
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+ phydev->rate_matching = RATE_MATCH_NONE;
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return 0;
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}
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@@ -647,6 +677,16 @@ static int aqr107_wait_processor_intensi
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return 0;
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}
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+static int aqr107_get_rate_matching(struct phy_device *phydev,
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+ phy_interface_t iface)
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+{
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+ if (iface == PHY_INTERFACE_MODE_10GBASER ||
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+ iface == PHY_INTERFACE_MODE_2500BASEX ||
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+ iface == PHY_INTERFACE_MODE_NA)
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+ return RATE_MATCH_PAUSE;
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+ return RATE_MATCH_NONE;
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+}
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+
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static int aqr107_suspend(struct phy_device *phydev)
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{
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int err;
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@@ -720,6 +760,7 @@ static struct phy_driver aqr_driver[] =
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PHY_ID_MATCH_MODEL(PHY_ID_AQR107),
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.name = "Aquantia AQR107",
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.probe = aqr107_probe,
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+ .get_rate_matching = aqr107_get_rate_matching,
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.config_init = aqr107_config_init,
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.config_aneg = aqr_config_aneg,
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.config_intr = aqr_config_intr,
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@@ -738,6 +779,7 @@ static struct phy_driver aqr_driver[] =
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PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
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.name = "Aquantia AQCS109",
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.probe = aqr107_probe,
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+ .get_rate_matching = aqr107_get_rate_matching,
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.config_init = aqcs109_config_init,
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.config_aneg = aqr_config_aneg,
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.config_intr = aqr_config_intr,
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@@ -764,6 +806,7 @@ static struct phy_driver aqr_driver[] =
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PHY_ID_MATCH_MODEL(PHY_ID_AQR113C),
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.name = "Aquantia AQR113C",
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.probe = aqr107_probe,
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+ .get_rate_matching = aqr107_get_rate_matching,
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.config_init = aqr107_config_init,
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.config_aneg = aqr_config_aneg,
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.config_intr = aqr_config_intr,
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@ -9,18 +9,15 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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--- a/drivers/net/phy/aquantia_main.c
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+++ b/drivers/net/phy/aquantia_main.c
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@@ -20,8 +20,10 @@
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#define PHY_ID_AQR105 0x03a1b4a2
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#define PHY_ID_AQR106 0x03a1b4d0
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#define PHY_ID_AQR107 0x03a1b4e0
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+#define PHY_ID_AQR113C 0x31c31c12
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@@ -23,6 +23,7 @@
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#define PHY_ID_AQCS109 0x03a1b5c2
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#define PHY_ID_AQR405 0x03a1b4b0
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#define PHY_ID_AQR113C 0x31c31c12
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+#define PHY_ID_AQR813 0x31c31cb2
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#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
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@@ -381,6 +383,49 @@ static int aqr107_read_rate(struct phy_d
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@@ -415,6 +416,49 @@ static int aqr107_read_rate(struct phy_d
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return 0;
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}
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@ -70,7 +67,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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static int aqr107_read_status(struct phy_device *phydev)
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{
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int val, ret;
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@@ -511,7 +556,7 @@ static void aqr107_chip_info(struct phy_
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@@ -554,7 +598,7 @@ static void aqr107_chip_info(struct phy_
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build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);
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prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);
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@ -79,34 +76,18 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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fw_major, fw_minor, build_id, prov_id);
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}
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@@ -719,6 +764,24 @@ static struct phy_driver aqr_driver[] =
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.link_change_notify = aqr107_link_change_notify,
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},
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{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C),
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+ .name = "Aquantia AQR113C",
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+ .probe = aqr107_probe,
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+ .config_init = aqr107_config_init,
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+ .config_aneg = aqr_config_aneg,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr113c_read_status,
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+ .get_tunable = aqr107_get_tunable,
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+ .set_tunable = aqr107_set_tunable,
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+ .suspend = aqr107_suspend,
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+ .resume = aqr107_resume,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+ .link_change_notify = aqr107_link_change_notify,
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+},
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+{
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PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
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.name = "Aquantia AQCS109",
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.probe = aqr107_probe,
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@@ -744,6 +807,24 @@ static struct phy_driver aqr_driver[] =
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@@ -811,7 +855,7 @@ static struct phy_driver aqr_driver[] =
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.config_aneg = aqr_config_aneg,
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.config_intr = aqr_config_intr,
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.handle_interrupt = aqr_handle_interrupt,
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.read_status = aqr_read_status,
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- .read_status = aqr107_read_status,
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+ .read_status = aqr113c_read_status,
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.get_tunable = aqr107_get_tunable,
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.set_tunable = aqr107_set_tunable,
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.suspend = aqr107_suspend,
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@@ -821,6 +865,24 @@ static struct phy_driver aqr_driver[] =
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.get_stats = aqr107_get_stats,
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.link_change_notify = aqr107_link_change_notify,
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},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR813),
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@ -129,13 +110,10 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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};
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module_phy_driver(aqr_driver);
|
||||
@@ -754,8 +835,10 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
@@ -834,6 +896,7 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
|
||||
{ }
|
||||
};
|
||||
|
@ -15,19 +15,16 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
||||
|
||||
--- a/drivers/net/phy/aquantia_main.c
|
||||
+++ b/drivers/net/phy/aquantia_main.c
|
||||
@@ -20,9 +20,11 @@
|
||||
#define PHY_ID_AQR105 0x03a1b4a2
|
||||
#define PHY_ID_AQR106 0x03a1b4d0
|
||||
#define PHY_ID_AQR107 0x03a1b4e0
|
||||
+#define PHY_ID_AQR112 0x03a1b662
|
||||
#define PHY_ID_AQR113C 0x31c31c12
|
||||
#define PHY_ID_AQCS109 0x03a1b5c2
|
||||
@@ -24,6 +24,8 @@
|
||||
#define PHY_ID_AQR405 0x03a1b4b0
|
||||
+#define PHY_ID_AQR412 0x03a1b712
|
||||
#define PHY_ID_AQR113C 0x31c31c12
|
||||
#define PHY_ID_AQR813 0x31c31cb2
|
||||
+#define PHY_ID_AQR112 0x03a1b662
|
||||
+#define PHY_ID_AQR412 0x03a1b712
|
||||
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
|
||||
@@ -135,6 +137,29 @@
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
|
||||
@@ -151,6 +153,29 @@
|
||||
#define AQR107_OP_IN_PROG_SLEEP 1000
|
||||
#define AQR107_OP_IN_PROG_TIMEOUT 100000
|
||||
|
||||
@ -57,7 +54,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
||||
struct aqr107_hw_stat {
|
||||
const char *name;
|
||||
int reg;
|
||||
@@ -266,6 +291,51 @@ static int aqr_config_aneg(struct phy_de
|
||||
@@ -282,6 +307,51 @@ static int aqr_config_aneg(struct phy_de
|
||||
return genphy_c45_check_and_restart_aneg(phydev, changed);
|
||||
}
|
||||
|
||||
@ -109,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
||||
static int aqr_config_intr(struct phy_device *phydev)
|
||||
{
|
||||
bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
|
||||
@@ -825,6 +895,30 @@ static struct phy_driver aqr_driver[] =
|
||||
@@ -883,6 +953,30 @@ static struct phy_driver aqr_driver[] =
|
||||
.get_stats = aqr107_get_stats,
|
||||
.link_change_notify = aqr107_link_change_notify,
|
||||
},
|
||||
@ -140,15 +137,12 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
||||
};
|
||||
|
||||
module_phy_driver(aqr_driver);
|
||||
@@ -835,9 +929,11 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
|
||||
@@ -897,6 +991,8 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -14,7 +14,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
||||
|
||||
--- a/drivers/net/phy/aquantia_main.c
|
||||
+++ b/drivers/net/phy/aquantia_main.c
|
||||
@@ -324,10 +324,16 @@ static int aqr_config_aneg_set_prot(stru
|
||||
@@ -340,10 +340,16 @@ static int aqr_config_aneg_set_prot(stru
|
||||
phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
|
||||
aquantia_syscfg[if_type].start_rate);
|
||||
|
||||
|
@ -10,15 +10,15 @@ Add a new entry for AQR113 PHY_ID
|
||||
|
||||
--- a/drivers/net/phy/aquantia_main.c
|
||||
+++ b/drivers/net/phy/aquantia_main.c
|
||||
@@ -21,6 +21,7 @@
|
||||
#define PHY_ID_AQR106 0x03a1b4d0
|
||||
#define PHY_ID_AQR107 0x03a1b4e0
|
||||
@@ -26,6 +26,7 @@
|
||||
#define PHY_ID_AQR813 0x31c31cb2
|
||||
#define PHY_ID_AQR112 0x03a1b662
|
||||
#define PHY_ID_AQR412 0x03a1b712
|
||||
+#define PHY_ID_AQR113 0x31c31c40
|
||||
#define PHY_ID_AQR113C 0x31c31c12
|
||||
#define PHY_ID_AQCS109 0x03a1b5c2
|
||||
#define PHY_ID_AQR405 0x03a1b4b0
|
||||
@@ -914,6 +915,14 @@ static struct phy_driver aqr_driver[] =
|
||||
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
|
||||
@@ -972,6 +973,14 @@ static struct phy_driver aqr_driver[] =
|
||||
.get_stats = aqr107_get_stats,
|
||||
},
|
||||
{
|
||||
@ -33,11 +33,11 @@ Add a new entry for AQR113 PHY_ID
|
||||
PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
|
||||
.name = "Aquantia AQR412",
|
||||
.probe = aqr107_probe,
|
||||
@@ -936,6 +945,7 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
|
||||
@@ -999,6 +1008,7 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -12,16 +12,16 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
|
||||
--- a/drivers/net/phy/aquantia_main.c
|
||||
+++ b/drivers/net/phy/aquantia_main.c
|
||||
@@ -21,6 +21,8 @@
|
||||
#define PHY_ID_AQR106 0x03a1b4d0
|
||||
#define PHY_ID_AQR107 0x03a1b4e0
|
||||
@@ -27,6 +27,8 @@
|
||||
#define PHY_ID_AQR112 0x03a1b662
|
||||
#define PHY_ID_AQR412 0x03a1b712
|
||||
#define PHY_ID_AQR113 0x31c31c40
|
||||
+#define PHY_ID_AQR112C 0x03a1b790
|
||||
+#define PHY_ID_AQR112R 0x31c31d12
|
||||
#define PHY_ID_AQR113 0x31c31c40
|
||||
#define PHY_ID_AQR113C 0x31c31c12
|
||||
#define PHY_ID_AQCS109 0x03a1b5c2
|
||||
@@ -915,6 +917,30 @@ static struct phy_driver aqr_driver[] =
|
||||
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
|
||||
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
|
||||
@@ -973,6 +975,30 @@ static struct phy_driver aqr_driver[] =
|
||||
.get_stats = aqr107_get_stats,
|
||||
},
|
||||
{
|
||||
@ -52,12 +52,12 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
PHY_ID_MATCH_MODEL(PHY_ID_AQR113),
|
||||
.name = "Aquantia AQR113",
|
||||
.config_aneg = aqr_config_aneg,
|
||||
@@ -945,6 +971,8 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
|
||||
@@ -1009,6 +1035,8 @@ static struct mdio_device_id __maybe_unu
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112C) },
|
||||
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112R) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user