ExternalVendorCode/openwrt
1
0
Fork 0
mirror of https://github.com/openwrt/openwrt.git synced 2024-12-29 18:19:02 +00:00
Code Issues Actions 4 Packages Projects Releases Wiki Activity

ar71xx: enable flow control for ethernet MACs with built-in switch

Browse Source 
Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch

Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Felix Fietkau 2016-06-14 11:27:20 +02:00
parent 9493613e94
commit 26b8db2537
3 changed files with 11 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
View File

@ -907,6 +907,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000; pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL; pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data; pdata->switch_data = &ath79_switch_data;
pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4); ath79_switch_data.phy_poll_mask |= BIT(4);
} }
@ -951,6 +952,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->has_gbit = 1; pdata->has_gbit = 1;
pdata->duplex = DUPLEX_FULL; pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data; pdata->switch_data = &ath79_switch_data;
pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4); ath79_switch_data.phy_poll_mask |= BIT(4);
} }
@ -979,6 +981,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->set_speed = ath79_set_speed_dummy; pdata->set_speed = ath79_set_speed_dummy;
pdata->switch_data = &ath79_switch_data; pdata->switch_data = &ath79_switch_data;
pdata->builtin_switch = 1;
/* reset the built-in switch */ /* reset the built-in switch */
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);
@ -1015,6 +1018,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000; pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL; pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data; pdata->switch_data = &ath79_switch_data;
pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4); ath79_switch_data.phy_poll_mask |= BIT(4);
} }
@ -1040,6 +1044,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = QCA955X_RESET_GE1_MAC | pdata->reset_bit = QCA955X_RESET_GE1_MAC |
QCA955X_RESET_GE1_MDIO; QCA955X_RESET_GE1_MDIO;
pdata->set_speed = qca955x_set_speed_sgmii; pdata->set_speed = qca955x_set_speed_sgmii;
pdata->builtin_switch = 1;
} }
pdata->has_gbit = 1; pdata->has_gbit = 1;
@ -1083,6 +1088,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000; pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL; pdata->duplex = DUPLEX_FULL;
pdata->builtin_switch = 1;
/* reset the built-in switch */ /* reset the built-in switch */
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);

1
target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
View File

@ -36,6 +36,7 @@ struct ag71xx_platform_data {
u8 is_ar7240:1; u8 is_ar7240:1;
u8 is_ar724x:1; u8 is_ar724x:1;
u8 has_ar8216:1; u8 has_ar8216:1;
u8 builtin_switch:1;
struct ag71xx_switch_platform_data *switch_data; struct ag71xx_switch_platform_data *switch_data;

5
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@ -453,9 +453,12 @@ static void ag71xx_hw_stop(struct ag71xx *ag)
static void ag71xx_hw_setup(struct ag71xx *ag) static void ag71xx_hw_setup(struct ag71xx *ag)
{ {
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
u32 init = MAC_CFG1_INIT;
/* setup MAC configuration registers */ /* setup MAC configuration registers */
ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); if (pdata->builtin_switch)
init |= MAC_CFG1_TFC | MAC_CFG1_RFC;
ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init);
ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);