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ath79: fix QCA953x DDR and GPIO compatible bindings

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The memory as well as GPIO controller had the wrong SoC name used for
their compatible binding.

Signed-off-by: David Bauer <mail@david-bauer.net>
This commit is contained in:
David Bauer 2020-04-19 18:28:09 +02:00
parent fceef288cf
commit 1f45ed6c99
1 changed files with 2 additions and 2 deletions
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4
target/linux/ath79/dts/qca953x.dtsi
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@ -34,7 +34,7 @@
ahb {
apb {
ddr_ctrl: memory-controller@18000000 {
compatible = "qca,ar9530-ddr-controller",
compatible = "qca,qca9530-ddr-controller",
"qca,ar7240-ddr-controller";
reg = <0x18000000 0x128>;
@ -69,7 +69,7 @@
};
gpio: gpio@18040000 {
compatible = "qca,ar9530-gpio",
compatible = "qca,qca9530-gpio",
"qca,ar9340-gpio";
reg = <0x18040000 0x28>;