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ath79: refactor dts of TP-Link CPE710-v1
This is done in preparation of adding support for the CPE710-v2,
which uses a similiar device tree.
Signed-off-by: Tim Noack <tim@noack.id>
Link: https://github.com/openwrt/openwrt/pull/16637
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 832cc8ce04)
Link: https://github.com/openwrt/openwrt/pull/17097
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit is contained in:
Tim Noack
Petr Štetiar
parent
50ee6adc5a
commit
1e0f790d23
@ -1,151 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca956x.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "qca9563_tplink_cpe710.dtsi"
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/ {
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model = "TP-Link CPE710 v1";
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compatible = "tplink,cpe710-v1", "qca,qca9563";
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aliases {
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label-mac-device = ð0;
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led-boot = &led_lan;
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led-failsafe = &led_lan;
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led-upgrade = &led_lan;
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};
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leds {
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compatible = "gpio-leds";
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led_lan: lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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};
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wlan5g {
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label = "blue:wlan5g";
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&pcie {
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status = "okay";
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&precal_art_5000>, <&macaddr_info_8>;
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nvmem-cell-names = "pre-calibration", "mac-address";
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};
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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};
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partition@50000 {
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label = "partition-table";
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reg = <0x050000 0x010000>;
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read-only;
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};
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info: partition@60000 {
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label = "info";
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reg = <0x060000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_info_8: macaddr@8 {
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reg = <0x8 0x6>;
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};
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};
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};
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partition@70000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x070000 0xf50000>;
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};
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partition@fc0000 {
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label = "config";
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reg = <0xfc0000 0x030000>;
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read-only;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_5000: pre-calibration@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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};
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};
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};
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};
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&pinmux {
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mdio_pins: mdio_pins {
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/* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */
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pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>;
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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phy4: ethernet-phy@4 {
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reg = <4>;
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reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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@ -153,17 +15,6 @@
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};
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ð0 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "sgmii";
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nvmem-cells = <&macaddr_info_8>;
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nvmem-cell-names = "mac-address";
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qca956x-serdes-fixup;
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gmac-config {
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device = <&gmac>;
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};
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};
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160
target/linux/ath79/dts/qca9563_tplink_cpe710.dtsi
Normal file
160
target/linux/ath79/dts/qca9563_tplink_cpe710.dtsi
Normal file
@ -0,0 +1,160 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca956x.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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led-boot = &led_lan;
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led-failsafe = &led_lan;
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led-upgrade = &led_lan;
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label-mac-device = ð0;
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};
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leds {
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compatible = "gpio-leds";
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led_lan: lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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};
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wlan5g {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WLAN_5GHZ;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&pcie {
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status = "okay";
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&precal_art_5000>, <&macaddr_info_8>;
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nvmem-cell-names = "pre-calibration", "mac-address";
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};
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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read-only;
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};
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partition@50000 {
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label = "partition-table";
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reg = <0x050000 0x010000>;
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read-only;
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};
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partition@60000 {
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label = "info";
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reg = <0x060000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_info_8: macaddr@8 {
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reg = <0x8 0x6>;
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};
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};
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};
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partition@70000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x070000 0xf50000>;
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};
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partition@fc0000 {
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label = "config";
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reg = <0xfc0000 0x030000>;
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read-only;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_5000: pre-calibration@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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};
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};
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};
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};
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&pinmux {
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mdio_pins: mdio_pins {
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/* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */
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pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>;
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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};
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ð0 {
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status = "okay";
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nvmem-cells = <&macaddr_info_8>;
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nvmem-cell-names = "mac-address";
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qca956x-serdes-fixup;
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gmac-config {
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device = <&gmac>;
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};
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};
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