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rockchip: add Radxa ROCK 5B support
Hardware -------- RockChip RK3588 ARM64 (8 cores) 4/8/16/32GB LPDDR4X RAM 2500 Base-T RGB LED eMMC Connector SPI-NOR 16MB Micro-SD Slot 2x USB 2.0 Port 2x USB 3.0 Port Headphone Jack M.2 E-Key M.2 M-Key USB PD 5/9/12/15/20V Power Install -------- Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/16149 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
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1c61a8f958
@ -141,6 +141,15 @@ define Device/radxa_rock-5a
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endef
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endef
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TARGET_DEVICES += radxa_rock-5a
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TARGET_DEVICES += radxa_rock-5a
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define Device/radxa_rock-5b
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DEVICE_VENDOR := Radxa
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DEVICE_MODEL := ROCK 5B
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SOC := rk3588
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UBOOT_DEVICE_NAME := rock5b-rk3588
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DEVICE_PACKAGES := kmod-r8169 kmod-hwmon-pwmfan
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endef
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TARGET_DEVICES += radxa_rock-5b
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define Device/radxa_rock-pi-4a
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define Device/radxa_rock-pi-4a
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DEVICE_VENDOR := Radxa
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DEVICE_VENDOR := Radxa
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DEVICE_MODEL := ROCK Pi 4A
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DEVICE_MODEL := ROCK Pi 4A
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@ -0,0 +1,72 @@
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From 42145b7a823530f57983fb6e6897f40c0be278d5 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Mon, 18 Sep 2023 16:14:49 +0200
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Subject: [PATCH] arm64: dts: rockchip: add PCIe network controller to rock-5b
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Enable the RTL8125 network controller, which is connected via
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PCIe.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20230918141451.131247-2-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3588-rock-5b.dts | 27 +++++++++++++++++++
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1 file changed, 27 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -43,6 +43,15 @@
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#cooling-cells = <2>;
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};
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+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_pcie2x1l2";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <5000>;
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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@@ -77,6 +86,10 @@
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};
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};
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+&combphy0_ps {
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+ status = "okay";
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+};
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+
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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@@ -203,6 +216,14 @@
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};
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};
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+&pcie2x1l2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie2_2_rst>;
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+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
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+ status = "okay";
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+};
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+
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&pinctrl {
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hym8563 {
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hym8563_int: hym8563-int {
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@@ -216,6 +237,12 @@
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};
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};
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+ pcie2 {
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+ pcie2_2_rst: pcie2-2-rst {
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+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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@ -0,0 +1,73 @@
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From 199cbd5f195adbc0e70ad218cdba82f45750f11b Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Mon, 18 Sep 2023 16:14:50 +0200
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Subject: [PATCH] arm64: dts: rockchip: add PCIe for M.2 M-key to rock-5b
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The Radxa Rock 5B has PCIe 3x4 routed to its M.2 M-key connector
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on the board's back.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20230918141451.131247-3-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3588-rock-5b.dts | 35 +++++++++++++++++++
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1 file changed, 35 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -52,6 +52,19 @@
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vin-supply = <&vcc_3v3_s3>;
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};
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+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie3_vcc3v3_en>;
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+ regulator-name = "vcc3v3_pcie30";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <5000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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@@ -224,6 +237,18 @@
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status = "okay";
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};
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+&pcie30phy {
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+ status = "okay";
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+};
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+
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+&pcie3x4 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie3_rst>;
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+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie30>;
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+ status = "okay";
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+};
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+
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&pinctrl {
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hym8563 {
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hym8563_int: hym8563-int {
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@@ -243,6 +268,16 @@
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};
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};
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+ pcie3 {
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+ pcie3_rst: pcie3-rst {
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+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
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+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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@ -0,0 +1,80 @@
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From da447ec387800bdf2df1fb1d8c1522991d025952 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Mon, 18 Sep 2023 16:14:51 +0200
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Subject: [PATCH] arm64: dts: rockchip: add PCIe for M.2 E-Key to rock-5b
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Enable PCIe2_0 controller and its voltage supply, which is routed
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to the M.2 E-Key on the upper side of the Radxa Rock 5B.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20230918141451.131247-4-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3588-rock-5b.dts | 35 +++++++++++++++++++
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1 file changed, 35 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -43,6 +43,21 @@
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#cooling-cells = <2>;
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};
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+ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
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+ regulator-name = "vcc3v3_pcie2x1l0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <50000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie2x1l2";
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@@ -103,6 +118,10 @@
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status = "okay";
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};
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+&combphy1_ps {
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+ status = "okay";
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+};
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+
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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@@ -229,6 +248,14 @@
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};
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};
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+&pcie2x1l0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie2_0_rst>;
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+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
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+ status = "okay";
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+};
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+
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&pcie2x1l2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_2_rst>;
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@@ -263,6 +290,14 @@
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};
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pcie2 {
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+ pcie2_0_rst: pcie2-0-rst {
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+ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
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+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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pcie2_2_rst: pcie2-2-rst {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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@ -0,0 +1,93 @@
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From 1c9a53ff7ece056eb995332f0d9523ca43fdcb5a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <tszucs@protonmail.ch>
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Date: Sun, 24 Sep 2023 20:37:45 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add sdio node to rock-5b
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Enable SDIO on Radxa ROCK 5 Model B M.2 Key E. Add sdio node and alias as mmc2.
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Add regulator for the 3.3 V rail bringing it up during boot. Make sure EKEY_EN
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is muxed as GPIO.
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Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
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Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20230924203740.65744-1-tszucs@protonmail.ch
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3588-rock-5b.dts | 43 +++++++++++++++++++
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1 file changed, 43 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -12,6 +12,7 @@
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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+ mmc2 = &sdio;
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};
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chosen {
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@@ -112,6 +113,21 @@
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc5v0_sys>;
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};
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+
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+ vcc3v3_wf: vcc3v3-wf-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_wf";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc3v3_wf_en>;
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+ startup-delay-us = <50000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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};
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&combphy0_ps {
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@@ -318,6 +334,12 @@
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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+
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+ m2e {
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+ vcc3v3_wf_en: vcc3v3-wf-en {
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+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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};
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&pwm1 {
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@@ -354,6 +376,27 @@
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status = "okay";
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};
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+&sdio {
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+ max-frequency = <200000000>;
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+ no-sd;
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+ no-mmc;
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+ non-removable;
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+ bus-width = <4>;
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+ cap-sdio-irq;
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+ disable-wp;
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+ keep-power-in-suspend;
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+ wakeup-source;
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+ sd-uhs-sdr12;
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+ sd-uhs-sdr25;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ vmmc-supply = <&vcc3v3_wf>;
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||||||
|
+ vqmmc-supply = <&vcc_1v8_s3>;
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&sdiom0_pins>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&spi2 {
|
||||||
|
status = "okay";
|
||||||
|
assigned-clocks = <&cru CLK_SPI2>;
|
@ -0,0 +1,65 @@
|
|||||||
|
From 0002c377e862140ad65b67b8b9dbf086d4578f95 Mon Sep 17 00:00:00 2001
|
||||||
|
From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <tszucs@protonmail.ch>
|
||||||
|
Date: Wed, 11 Oct 2023 18:18:05 +0000
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: Remove duplicate regulator vcc3v3_wf
|
||||||
|
from rock-5b
|
||||||
|
MIME-Version: 1.0
|
||||||
|
Content-Type: text/plain; charset=UTF-8
|
||||||
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
|
Regulator for VCC3V3_WF has been added as vcc3v3_pcie2x1l0 first. Clean this up.
|
||||||
|
|
||||||
|
Fixes: 1c9a53ff7ece ("arm64: dts: rockchip: Add sdio node to rock-5b")
|
||||||
|
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
|
||||||
|
Link: https://lore.kernel.org/r/20231011181757.58047-1-tszucs@protonmail.ch
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
.../boot/dts/rockchip/rk3588-rock-5b.dts | 23 +------------------
|
||||||
|
1 file changed, 1 insertion(+), 22 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -113,21 +113,6 @@
|
||||||
|
regulator-max-microvolt = <1100000>;
|
||||||
|
vin-supply = <&vcc5v0_sys>;
|
||||||
|
};
|
||||||
|
-
|
||||||
|
- vcc3v3_wf: vcc3v3-wf-regulator {
|
||||||
|
- compatible = "regulator-fixed";
|
||||||
|
- regulator-name = "vcc3v3_wf";
|
||||||
|
- regulator-always-on;
|
||||||
|
- regulator-boot-on;
|
||||||
|
- regulator-min-microvolt = <3300000>;
|
||||||
|
- regulator-max-microvolt = <3300000>;
|
||||||
|
- enable-active-high;
|
||||||
|
- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
|
||||||
|
- pinctrl-names = "default";
|
||||||
|
- pinctrl-0 = <&vcc3v3_wf_en>;
|
||||||
|
- startup-delay-us = <50000>;
|
||||||
|
- vin-supply = <&vcc5v0_sys>;
|
||||||
|
- };
|
||||||
|
};
|
||||||
|
|
||||||
|
&combphy0_ps {
|
||||||
|
@@ -334,12 +319,6 @@
|
||||||
|
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
-
|
||||||
|
- m2e {
|
||||||
|
- vcc3v3_wf_en: vcc3v3-wf-en {
|
||||||
|
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
- };
|
||||||
|
- };
|
||||||
|
};
|
||||||
|
|
||||||
|
&pwm1 {
|
||||||
|
@@ -390,7 +369,7 @@
|
||||||
|
sd-uhs-sdr25;
|
||||||
|
sd-uhs-sdr50;
|
||||||
|
sd-uhs-sdr104;
|
||||||
|
- vmmc-supply = <&vcc3v3_wf>;
|
||||||
|
+ vmmc-supply = <&vcc3v3_pcie2x1l0>;
|
||||||
|
vqmmc-supply = <&vcc_1v8_s3>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdiom0_pins>;
|
@ -0,0 +1,32 @@
|
|||||||
|
From a6169ab369236f15c79b45037074a2567d30b037 Mon Sep 17 00:00:00 2001
|
||||||
|
From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <szucst@iit.uni-miskolc.hu>
|
||||||
|
Date: Fri, 13 Oct 2023 23:51:53 +0200
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: Enable UART6 on rock-5b
|
||||||
|
MIME-Version: 1.0
|
||||||
|
Content-Type: text/plain; charset=UTF-8
|
||||||
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
|
Enable UART lines on Radxa ROCK 5 Model B M.2 Key E.
|
||||||
|
|
||||||
|
Signed-off-by: Tamás Szűcs <szucst@iit.uni-miskolc.hu>
|
||||||
|
Link: https://lore.kernel.org/r/20231013215208.81345-1-szucst@iit.uni-miskolc.hu
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 6 ++++++
|
||||||
|
1 file changed, 6 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -376,6 +376,12 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&uart6 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&spi2 {
|
||||||
|
status = "okay";
|
||||||
|
assigned-clocks = <&cru CLK_SPI2>;
|
@ -0,0 +1,57 @@
|
|||||||
|
From 7952cbbda301f7d297c6ac761f9dfafb90205358 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Date: Thu, 5 Oct 2023 15:40:37 +0200
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: add status LED to rock-5b
|
||||||
|
|
||||||
|
Describe the Rock 5B status LED in its device tree.
|
||||||
|
|
||||||
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20231005134037.33231-1-sebastian.reichel@collabora.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
.../boot/dts/rockchip/rk3588-rock-5b.dts | 20 +++++++++++++++++++
|
||||||
|
1 file changed, 20 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -3,6 +3,7 @@
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
+#include <dt-bindings/leds/common.h>
|
||||||
|
#include "rk3588.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
@@ -36,6 +37,19 @@
|
||||||
|
pinctrl-0 = <&hp_detect>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ leds {
|
||||||
|
+ compatible = "gpio-leds";
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&led_rgb_b>;
|
||||||
|
+
|
||||||
|
+ led_rgb_b {
|
||||||
|
+ function = LED_FUNCTION_STATUS;
|
||||||
|
+ color = <LED_COLOR_ID_BLUE>;
|
||||||
|
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||||
|
+ linux,default-trigger = "heartbeat";
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
fan: pwm-fan {
|
||||||
|
compatible = "pwm-fan";
|
||||||
|
cooling-levels = <0 95 145 195 255>;
|
||||||
|
@@ -284,6 +298,12 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+ leds {
|
||||||
|
+ led_rgb_b: led-rgb-b {
|
||||||
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
sound {
|
||||||
|
hp_detect: hp-detect {
|
||||||
|
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
@ -0,0 +1,39 @@
|
|||||||
|
From f97d78b9f6cff4c680206a8c8b03f726f0dc2c8b Mon Sep 17 00:00:00 2001
|
||||||
|
From: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Date: Mon, 6 Nov 2023 16:54:31 +0100
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: add USB3 host to rock-5b
|
||||||
|
|
||||||
|
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds
|
||||||
|
USB3 for the upper USB3 port (the one further away from the PCB).
|
||||||
|
|
||||||
|
The lower USB3 and the USB-C ports use the RK3588 USB TypeC host
|
||||||
|
controller, which use a different PHY without upstream support.
|
||||||
|
|
||||||
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 8 ++++++++
|
||||||
|
1 file changed, 8 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -137,6 +137,10 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&combphy2_psu {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&cpu_b0 {
|
||||||
|
cpu-supply = <&vdd_cpu_big0_s0>;
|
||||||
|
};
|
||||||
|
@@ -764,3 +768,7 @@
|
||||||
|
&usb_host1_ohci {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
+
|
||||||
|
+&usb_host2_xhci {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
@ -0,0 +1,31 @@
|
|||||||
|
From 7738f551173540b3daa63a91b384b167eacd24fd Mon Sep 17 00:00:00 2001
|
||||||
|
From: John Clark <inindev@gmail.com>
|
||||||
|
Date: Mon, 25 Dec 2023 22:28:19 +0000
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: support poweroff on the rock-5b
|
||||||
|
|
||||||
|
Allow the rock-5b to poweroff its pmic. When issuing a "shutdown -h now"
|
||||||
|
on the rock-5b it reboots instead. Defining 'system-power-controller'
|
||||||
|
allows the rk806 to power down.
|
||||||
|
|
||||||
|
Commit c699fbfdfd54 ("arm64: dts: rockchip: Support poweroff on
|
||||||
|
NanoPC-T6") similarly resolves this issue for the nanopc-t6.
|
||||||
|
|
||||||
|
Signed-off-by: John Clark <inindev@gmail.com>
|
||||||
|
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20231225222859.17153-1-inindev@gmail.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 ++
|
||||||
|
1 file changed, 2 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -426,6 +426,8 @@
|
||||||
|
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||||
|
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||||
|
|
||||||
|
+ system-power-controller;
|
||||||
|
+
|
||||||
|
vcc1-supply = <&vcc5v0_sys>;
|
||||||
|
vcc2-supply = <&vcc5v0_sys>;
|
||||||
|
vcc3-supply = <&vcc5v0_sys>;
|
@ -0,0 +1,27 @@
|
|||||||
|
From aed6514c4e3aee843385ded4c5ee0921b51c30fa Mon Sep 17 00:00:00 2001
|
||||||
|
From: John Clark <inindev@gmail.com>
|
||||||
|
Date: Mon, 25 Dec 2023 22:28:20 +0000
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
|
||||||
|
|
||||||
|
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and
|
||||||
|
gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1.
|
||||||
|
|
||||||
|
Signed-off-by: John Clark <inindev@gmail.com>
|
||||||
|
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20231225222859.17153-2-inindev@gmail.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 +-
|
||||||
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -448,7 +448,7 @@
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
|
||||||
|
rk806_dvs1_null: dvs1-null-pins {
|
||||||
|
- pins = "gpio_pwrctrl2";
|
||||||
|
+ pins = "gpio_pwrctrl1";
|
||||||
|
function = "pin_fun0";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,34 @@
|
|||||||
|
From 82d40b141a4c7ab6608a84a5ce0c58b747cb7163 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Date: Sun, 7 Jan 2024 00:26:45 +0400
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5b
|
||||||
|
|
||||||
|
By default the GPIO pin that connects to the WiFi enable signal
|
||||||
|
inside the M.2 Key E slot is driven low, resulting in impossibility
|
||||||
|
to connect to any network. Add a DT node to expose it as an RFKILL
|
||||||
|
device, which lets the WiFi driver or userspace toggle it as
|
||||||
|
required.
|
||||||
|
|
||||||
|
Signed-off-by: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240106202650.22310-1-alchark@gmail.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 7 +++++++
|
||||||
|
1 file changed, 7 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -58,6 +58,13 @@
|
||||||
|
#cooling-cells = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+ rfkill {
|
||||||
|
+ compatible = "rfkill-gpio";
|
||||||
|
+ label = "rfkill-pcie-wlan";
|
||||||
|
+ radio-type = "wlan";
|
||||||
|
+ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
@ -0,0 +1,29 @@
|
|||||||
|
From 038347286941148b6fd0cc2c40afcd540315aa6f Mon Sep 17 00:00:00 2001
|
||||||
|
From: Boris Brezillon <boris.brezillon@collabora.com>
|
||||||
|
Date: Tue, 26 Mar 2024 17:52:07 +0100
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: Enable GPU on rk3588-rock5b
|
||||||
|
|
||||||
|
Enable the Mali GPU in the Rock 5B.
|
||||||
|
|
||||||
|
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
|
||||||
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240326165232.73585-4-sebastian.reichel@collabora.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 5 +++++
|
||||||
|
1 file changed, 5 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -180,6 +180,11 @@
|
||||||
|
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
+&gpu {
|
||||||
|
+ mali-supply = <&vdd_gpu_s0>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&i2c0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c0m2_xfer>;
|
@ -0,0 +1,43 @@
|
|||||||
|
From 45e831033f7a00a14f64afa1e34c476a9ff0f9f0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Dragan Simic <dsimic@manjaro.org>
|
||||||
|
Date: Thu, 18 Apr 2024 18:26:20 +0200
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: Correct the model names for Radxa ROCK
|
||||||
|
5 boards
|
||||||
|
|
||||||
|
Correct the descriptions of a few Radxa boards, according to the up-to-date
|
||||||
|
documentation from Radxa and the detailed explanation from Naoki. [1] To sum
|
||||||
|
it up, the short naming, as specified by Radxa, is preferred.
|
||||||
|
|
||||||
|
[1] https://lore.kernel.org/linux-rockchip/B26C732A4DCEA9B3+282b8775-601b-4d4a-a513-4924b7940076@radxa.com/
|
||||||
|
|
||||||
|
Suggested-by: FUKAUMI Naoki <naoki@radxa.com>
|
||||||
|
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
|
||||||
|
Link: https://lore.kernel.org/r/6931289a252dc2d6c7bfd2388835c5e98ba0d8c9.1713457260.git.dsimic@manjaro.org
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 +-
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 2 +-
|
||||||
|
2 files changed, 2 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -7,7 +7,7 @@
|
||||||
|
#include "rk3588.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
- model = "Radxa ROCK 5 Model B";
|
||||||
|
+ model = "Radxa ROCK 5B";
|
||||||
|
compatible = "radxa,rock-5b", "rockchip,rk3588";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
|
||||||
|
@@ -8,7 +8,7 @@
|
||||||
|
#include "rk3588s.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
- model = "Radxa ROCK 5 Model A";
|
||||||
|
+ model = "Radxa ROCK 5A";
|
||||||
|
compatible = "radxa,rock-5a", "rockchip,rk3588s";
|
||||||
|
|
||||||
|
aliases {
|
@ -0,0 +1,55 @@
|
|||||||
|
From 494532921aacb496529d544fedfdb3a7b43dfef0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Date: Tue, 9 Apr 2024 00:50:37 +0200
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: add lower USB3 port to rock-5b
|
||||||
|
|
||||||
|
Enable full support (XHCI, EHCI, OHCI) for the lower USB3 port from
|
||||||
|
Radxa Rock 5 Model B. The upper one is already supported.
|
||||||
|
|
||||||
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240408225109.128953-11-sebastian.reichel@collabora.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 17 +++++++++++++++++
|
||||||
|
1 file changed, 17 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -748,6 +748,14 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&u2phy1 {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&u2phy1_otg {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&u2phy2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
@@ -767,6 +775,10 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&usbdp_phy1 {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&usb_host0_ehci {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
@@ -783,6 +795,11 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&usb_host1_xhci {
|
||||||
|
+ dr_mode = "host";
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&usb_host2_xhci {
|
||||||
|
status = "okay";
|
||||||
|
};
|
@ -0,0 +1,67 @@
|
|||||||
|
From 4a152231b050590af771fa3cc8462ed08b691a24 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Date: Mon, 17 Jun 2024 22:28:54 +0400
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: enable automatic fan control on Rock 5B
|
||||||
|
|
||||||
|
This links the PWM fan on Radxa Rock 5B as an active cooling device
|
||||||
|
managed automatically by the thermal subsystem, with a target SoC
|
||||||
|
temperature of 65C and a minimum-spin interval from 55C to 65C to
|
||||||
|
ensure airflow when the system gets warm
|
||||||
|
|
||||||
|
Helped-by: Dragan Simic <dsimic@manjaro.org>
|
||||||
|
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
|
||||||
|
Signed-off-by: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-4-c1f5f3267f1e@gmail.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
.../boot/dts/rockchip/rk3588-rock-5b.dts | 32 ++++++++++++++++++-
|
||||||
|
1 file changed, 31 insertions(+), 1 deletion(-)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -52,7 +52,7 @@
|
||||||
|
|
||||||
|
fan: pwm-fan {
|
||||||
|
compatible = "pwm-fan";
|
||||||
|
- cooling-levels = <0 95 145 195 255>;
|
||||||
|
+ cooling-levels = <0 120 150 180 210 240 255>;
|
||||||
|
fan-supply = <&vcc5v0_sys>;
|
||||||
|
pwms = <&pwm1 0 50000 0>;
|
||||||
|
#cooling-cells = <2>;
|
||||||
|
@@ -278,6 +278,36 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
+
|
||||||
|
+&package_thermal {
|
||||||
|
+ polling-delay = <1000>;
|
||||||
|
+
|
||||||
|
+ trips {
|
||||||
|
+ package_fan0: package-fan0 {
|
||||||
|
+ temperature = <55000>;
|
||||||
|
+ hysteresis = <2000>;
|
||||||
|
+ type = "active";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ package_fan1: package-fan1 {
|
||||||
|
+ temperature = <65000>;
|
||||||
|
+ hysteresis = <2000>;
|
||||||
|
+ type = "active";
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ cooling-maps {
|
||||||
|
+ map1 {
|
||||||
|
+ trip = <&package_fan0>;
|
||||||
|
+ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ map2 {
|
||||||
|
+ trip = <&package_fan1>;
|
||||||
|
+ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
|
||||||
|
&pcie2x1l0 {
|
||||||
|
pinctrl-names = "default";
|
@ -0,0 +1,39 @@
|
|||||||
|
From 9204a7ecca96403ee3d61c14cb9eb87ec89b0fcd Mon Sep 17 00:00:00 2001
|
||||||
|
From: FUKAUMI Naoki <naoki@radxa.com>
|
||||||
|
Date: Sun, 23 Jun 2024 11:33:27 +0900
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: add SFC support for Radxa ROCK 5B
|
||||||
|
|
||||||
|
This commit adds support for SPI NOR flash on Radxa ROCK 5B.
|
||||||
|
|
||||||
|
SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency.
|
||||||
|
|
||||||
|
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240623023329.1044-1-naoki@radxa.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 14 ++++++++++++++
|
||||||
|
1 file changed, 14 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -442,6 +442,20 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&sfc {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&fspim2_pins>;
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ flash@0 {
|
||||||
|
+ compatible = "jedec,spi-nor";
|
||||||
|
+ reg = <0>;
|
||||||
|
+ spi-max-frequency = <104000000>;
|
||||||
|
+ spi-rx-bus-width = <4>;
|
||||||
|
+ spi-tx-bus-width = <1>;
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&uart6 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
|
@ -0,0 +1,66 @@
|
|||||||
|
From 2f8064b9c4a012b4d4e8383818f13b682b6c156a Mon Sep 17 00:00:00 2001
|
||||||
|
From: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Date: Mon, 17 Jun 2024 22:28:52 +0400
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: enable thermal management on all RK3588
|
||||||
|
boards
|
||||||
|
|
||||||
|
This enables the on-chip thermal monitoring sensor (TSADC) on all
|
||||||
|
RK3588(s) boards that don't have it enabled yet. It provides temperature
|
||||||
|
monitoring for the SoC and emergency thermal shutdowns, and is thus
|
||||||
|
important to have in place before CPU DVFS is enabled, as high CPU
|
||||||
|
operating performance points can overheat the chip quickly in the
|
||||||
|
absence of thermal management.
|
||||||
|
|
||||||
|
Signed-off-by: Alexey Charkov <alchark@gmail.com>
|
||||||
|
Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-2-c1f5f3267f1e@gmail.com
|
||||||
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||||
|
---
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 4 ++++
|
||||||
|
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 4 ++++
|
||||||
|
8 files changed, 32 insertions(+)
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
|
||||||
|
@@ -807,6 +807,10 @@
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&tsadc {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&u2phy2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -787,6 +787,10 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&tsadc {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&uart2 {
|
||||||
|
pinctrl-0 = <&uart2m0_xfer>;
|
||||||
|
status = "okay";
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
|
||||||
|
@@ -711,6 +711,10 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&tsadc {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&u2phy0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
@ -0,0 +1,38 @@
|
|||||||
|
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Tianling Shen <cnsztl@gmail.com>
|
||||||
|
Date: Mon Aug 05 16:14:33 2024 +0800
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Radxa
|
||||||
|
Rock 5B
|
||||||
|
|
||||||
|
Add OpenWrt's LED aliases for showing system status.
|
||||||
|
|
||||||
|
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -14,6 +14,11 @@
|
||||||
|
mmc0 = &sdhci;
|
||||||
|
mmc1 = &sdmmc;
|
||||||
|
mmc2 = &sdio;
|
||||||
|
+
|
||||||
|
+ led-boot = &status_led;
|
||||||
|
+ led-failsafe = &status_led;
|
||||||
|
+ led-running = &status_led;
|
||||||
|
+ led-upgrade = &status_led;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
@@ -42,11 +47,10 @@
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&led_rgb_b>;
|
||||||
|
|
||||||
|
- led_rgb_b {
|
||||||
|
+ status_led: led_rgb_b {
|
||||||
|
function = LED_FUNCTION_STATUS;
|
||||||
|
color = <LED_COLOR_ID_BLUE>;
|
||||||
|
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||||
|
- linux,default-trigger = "heartbeat";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,26 @@
|
|||||||
|
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Tianling Shen <cnsztl@gmail.com>
|
||||||
|
Date: Mon Aug 05 16:14:33 2024 +0800
|
||||||
|
Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for Radxa Rock 5B
|
||||||
|
|
||||||
|
The previously stated speed of sdr-104 in is too high for the hardware
|
||||||
|
to reliably communicate with some fast SD cards.
|
||||||
|
Rockchip boards have a common bug when operating uhs speed, which will
|
||||||
|
hang the system during a soft reboot.
|
||||||
|
|
||||||
|
To be on the safe side, lower the speed to workaround.
|
||||||
|
|
||||||
|
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||||
|
@@ -419,7 +419,7 @@
|
||||||
|
cap-sd-highspeed;
|
||||||
|
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||||
|
disable-wp;
|
||||||
|
- sd-uhs-sdr104;
|
||||||
|
+ sd-uhs-sdr50;
|
||||||
|
vmmc-supply = <&vcc_3v3_s3>;
|
||||||
|
vqmmc-supply = <&vccio_sd_s0>;
|
||||||
|
status = "okay";
|
Loading…
Reference in New Issue
Block a user