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bcm53xx: PCIe: add link check again
When there is no device connected to the controller we should not start the controller. This also changes between PCIe 1.0 and PCIe 2.0 speed based on the device. This code is based on code from the new Broadcom PCIe controller driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 43748
This commit is contained in:
Hauke Mehrtens
parent
180c1f3302
commit
192e945479
@ -72,7 +72,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+obj-$(CONFIG_PCI_BCM5301X) += pci-host-bcm5301x.o
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--- /dev/null
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+++ b/drivers/pci/host/pci-host-bcm5301x.c
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@@ -0,0 +1,428 @@
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@@ -0,0 +1,459 @@
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+/*
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+ * Northstar PCI-Express driver
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+ * Only supports Root-Complex (RC) mode
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@ -94,13 +94,16 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+#include <linux/pci.h>
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+#include <linux/io.h>
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+#include <linux/ioport.h>
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+#include <linux/interrupt.h>
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+#include <linux/bcma/bcma.h>
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+#include <linux/bcma/bcma_driver_pcie2.h>
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+#include <linux/of_irq.h>
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+
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+#define SOC_PCIE_HDR_OFF 0x400 /* 256 bytes per function */
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+
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+#define PCI_LINK_STATUS_CTRL_2_OFFSET 0xDC
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+#define PCI_TARGET_LINK_SPEED_MASK 0xF
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+#define PCI_TARGET_LINK_SPEED_GEN2 0x2
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+#define PCI_TARGET_LINK_SPEED_GEN1 0x1
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+
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+static int bcma_pcie2_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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+{
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+ struct pci_sys_data *sys = pdev->sysdata;
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@ -222,31 +225,59 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ * Check link status, return 0 if link is up in RC mode,
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+ * otherwise return non-zero
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+ */
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+static int bcma_pcie2_check_link(struct bcma_device *bdev, bool allow_gen2)
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+static int bcma_pcie2_check_link(struct bcma_device *bdev, struct pci_sys_data *sys)
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+{
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+ u32 devfn = 0;
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+ u32 tmp32;
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+ u8 tmp8;
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+ u16 tmp16;
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+ u16 pos;
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+ u8 nlw;
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+ /*
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+ * Setup callback (bcma_pcie2_setup) is called in pcibios_init_hw before
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+ * creating bus root, so we don't have it here yet. On the other hand
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+ * we really want to use pci_bus_find_capability helper to check NLW.
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+ * Let's fake simple pci_bus just to query for capabilities.
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+ */
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+ struct pci_bus bus = {
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+ .number = 0,
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+ .ops = &bcma_pcie2_ops,
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+ .sysdata = sys,
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+ };
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+
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, devfn, 0xdc, 4);
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+ tmp32 &= ~0xf;
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+ if (allow_gen2)
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+ tmp32 |= 2;
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+ else {
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+ /* force PCIE GEN1 */
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+ tmp32 |= 1;
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+ }
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+ bcma_pcie2_write_config(bdev, 0, devfn, 0xdc, 4, tmp32);
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+ tmp32 = bcma_read32(bdev, BCMA_CORE_PCIE2_LINK_STATUS);
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+ dev_dbg(&bdev->dev, "link status: 0x%08x\n", tmp32);
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+
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+ /* See if the port is in EP mode, indicated by header type 00 */
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+ tmp8 = bcma_pcie2_read_config(bdev, 0, devfn, PCI_HEADER_TYPE, 1);
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+ if (tmp8 != PCI_HEADER_TYPE_BRIDGE) {
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+ dev_info(&bdev->dev, "Port %d in End-Point mode - ignored\n",
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+ bdev->core_unit);
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+ return -ENODEV;
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+ tmp32 = bcma_read32(bdev, BCMA_CORE_PCIE2_STRAP_STATUS);
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+ dev_dbg(&bdev->dev, "strap status: 0x%08x\n", tmp32);
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+
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+ /* check link status to see if link is active */
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+ pos = pci_bus_find_capability(&bus, 0, PCI_CAP_ID_EXP);
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+ pci_bus_read_config_word(&bus, 0, pos + PCI_EXP_LNKSTA, &tmp16);
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+ nlw = (tmp16 & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
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+
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+ if (nlw == 0) {
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+ /* try GEN 1 link speed */
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4);
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+ if ((tmp32 & PCI_TARGET_LINK_SPEED_MASK) ==
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+ PCI_TARGET_LINK_SPEED_GEN2) {
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+ tmp32 &= ~PCI_TARGET_LINK_SPEED_MASK;
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+ tmp32 |= PCI_TARGET_LINK_SPEED_GEN1;
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+ bcma_pcie2_write_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4, tmp32);
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4);
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+ msleep(100);
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+
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+ pos = pci_bus_find_capability(&bus, 0, PCI_CAP_ID_EXP);
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+ pci_bus_read_config_word(&bus, 0, pos + PCI_EXP_LNKSTA,
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+ &tmp16);
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+ nlw = (tmp16 & PCI_EXP_LNKSTA_NLW) >>
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+ PCI_EXP_LNKSTA_NLW_SHIFT;
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+ }
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+ }
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+
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+ return 0;
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+ dev_info(&bdev->dev, "link: %s\n", nlw ? "UP" : "DOWN");
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+ return nlw ? 0 : -ENODEV;
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+}
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+
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+/*
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@ -438,7 +469,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ * Skip inactive ports -
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+ * will need to change this for hot-plugging
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+ */
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+ ret = bcma_pcie2_check_link(bdev, true);
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+ ret = bcma_pcie2_check_link(bdev, sys);
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+ if (ret)
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+ return ret;
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+
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@ -72,7 +72,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+obj-$(CONFIG_PCI_BCM5301X) += pci-host-bcm5301x.o
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--- /dev/null
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+++ b/drivers/pci/host/pci-host-bcm5301x.c
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@@ -0,0 +1,428 @@
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@@ -0,0 +1,459 @@
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+/*
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+ * Northstar PCI-Express driver
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+ * Only supports Root-Complex (RC) mode
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@ -94,13 +94,16 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+#include <linux/pci.h>
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+#include <linux/io.h>
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+#include <linux/ioport.h>
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+#include <linux/interrupt.h>
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+#include <linux/bcma/bcma.h>
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+#include <linux/bcma/bcma_driver_pcie2.h>
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+#include <linux/of_irq.h>
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+
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+#define SOC_PCIE_HDR_OFF 0x400 /* 256 bytes per function */
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+
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+#define PCI_LINK_STATUS_CTRL_2_OFFSET 0xDC
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+#define PCI_TARGET_LINK_SPEED_MASK 0xF
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+#define PCI_TARGET_LINK_SPEED_GEN2 0x2
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+#define PCI_TARGET_LINK_SPEED_GEN1 0x1
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+
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+static int bcma_pcie2_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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+{
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+ struct pci_sys_data *sys = pdev->sysdata;
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@ -222,31 +225,59 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ * Check link status, return 0 if link is up in RC mode,
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+ * otherwise return non-zero
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+ */
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+static int bcma_pcie2_check_link(struct bcma_device *bdev, bool allow_gen2)
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+static int bcma_pcie2_check_link(struct bcma_device *bdev, struct pci_sys_data *sys)
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+{
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+ u32 devfn = 0;
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+ u32 tmp32;
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+ u8 tmp8;
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+ u16 tmp16;
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+ u16 pos;
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+ u8 nlw;
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+ /*
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+ * Setup callback (bcma_pcie2_setup) is called in pcibios_init_hw before
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+ * creating bus root, so we don't have it here yet. On the other hand
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+ * we really want to use pci_bus_find_capability helper to check NLW.
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+ * Let's fake simple pci_bus just to query for capabilities.
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+ */
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+ struct pci_bus bus = {
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+ .number = 0,
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+ .ops = &bcma_pcie2_ops,
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+ .sysdata = sys,
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+ };
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+
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, devfn, 0xdc, 4);
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+ tmp32 &= ~0xf;
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+ if (allow_gen2)
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+ tmp32 |= 2;
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+ else {
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+ /* force PCIE GEN1 */
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+ tmp32 |= 1;
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+ }
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+ bcma_pcie2_write_config(bdev, 0, devfn, 0xdc, 4, tmp32);
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+ tmp32 = bcma_read32(bdev, BCMA_CORE_PCIE2_LINK_STATUS);
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+ dev_dbg(&bdev->dev, "link status: 0x%08x\n", tmp32);
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+
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+ /* See if the port is in EP mode, indicated by header type 00 */
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+ tmp8 = bcma_pcie2_read_config(bdev, 0, devfn, PCI_HEADER_TYPE, 1);
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+ if (tmp8 != PCI_HEADER_TYPE_BRIDGE) {
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+ dev_info(&bdev->dev, "Port %d in End-Point mode - ignored\n",
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+ bdev->core_unit);
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+ return -ENODEV;
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+ tmp32 = bcma_read32(bdev, BCMA_CORE_PCIE2_STRAP_STATUS);
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+ dev_dbg(&bdev->dev, "strap status: 0x%08x\n", tmp32);
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+
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+ /* check link status to see if link is active */
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+ pos = pci_bus_find_capability(&bus, 0, PCI_CAP_ID_EXP);
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+ pci_bus_read_config_word(&bus, 0, pos + PCI_EXP_LNKSTA, &tmp16);
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+ nlw = (tmp16 & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
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+
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+ if (nlw == 0) {
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+ /* try GEN 1 link speed */
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4);
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+ if ((tmp32 & PCI_TARGET_LINK_SPEED_MASK) ==
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+ PCI_TARGET_LINK_SPEED_GEN2) {
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+ tmp32 &= ~PCI_TARGET_LINK_SPEED_MASK;
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+ tmp32 |= PCI_TARGET_LINK_SPEED_GEN1;
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+ bcma_pcie2_write_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4, tmp32);
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+ tmp32 = bcma_pcie2_read_config(bdev, 0, 0,
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+ PCI_LINK_STATUS_CTRL_2_OFFSET, 4);
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+ msleep(100);
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+
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+ pos = pci_bus_find_capability(&bus, 0, PCI_CAP_ID_EXP);
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+ pci_bus_read_config_word(&bus, 0, pos + PCI_EXP_LNKSTA,
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+ &tmp16);
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+ nlw = (tmp16 & PCI_EXP_LNKSTA_NLW) >>
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+ PCI_EXP_LNKSTA_NLW_SHIFT;
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+ }
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+ }
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+
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+ return 0;
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+ dev_info(&bdev->dev, "link: %s\n", nlw ? "UP" : "DOWN");
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+ return nlw ? 0 : -ENODEV;
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+}
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+
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+/*
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@ -438,7 +469,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ * Skip inactive ports -
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+ * will need to change this for hot-plugging
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+ */
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+ ret = bcma_pcie2_check_link(bdev, true);
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+ ret = bcma_pcie2_check_link(bdev, sys);
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+ if (ret)
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+ return ret;
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+
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