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synced 2024-12-23 23:42:43 +00:00
ar71xx: add an external reset callback for ar913x and use it in ath9k - should reduce the frequency of DMA stop failures
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 36530
This commit is contained in:
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30c4360345
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18c588a570
@ -25,7 +25,43 @@
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int nstations; /* number of station vifs */
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int nstations; /* number of station vifs */
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -1698,12 +1698,11 @@ static void ath9k_hw_reset_opmode(struct
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@@ -1366,7 +1366,10 @@ static bool ath9k_hw_set_reset(struct at
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REGWRITE_BUFFER_FLUSH(ah);
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- udelay(50);
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+ if (AR_SREV_9100(ah))
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+ mdelay(10);
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+ else
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+ udelay(50);
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REG_WRITE(ah, AR_RTC_RC, 0);
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if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
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@@ -1377,8 +1380,12 @@ static bool ath9k_hw_set_reset(struct at
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if (!AR_SREV_9100(ah))
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REG_WRITE(ah, AR_RC, 0);
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- if (AR_SREV_9100(ah))
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+ if (AR_SREV_9100(ah) && type != ATH9K_RESET_WARM) {
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+ if (ah->external_reset)
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+ ah->external_reset();
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+
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udelay(50);
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+ }
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return true;
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}
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@@ -1464,7 +1471,8 @@ static bool ath9k_hw_chip_reset(struct a
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reset_type = ATH9K_RESET_POWER_ON;
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else
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reset_type = ATH9K_RESET_COLD;
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- } else if (ah->chip_fullsleep || REG_READ(ah, AR_Q_TXE) ||
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+ } else if (ah->chip_fullsleep ||
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+ REG_READ(ah, AR_Q_TXE) ||
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(REG_READ(ah, AR_CR) & AR_CR_RXE))
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reset_type = ATH9K_RESET_COLD;
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@@ -1698,12 +1706,11 @@ static void ath9k_hw_reset_opmode(struct
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ENABLE_REGWRITE_BUFFER(ah);
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ENABLE_REGWRITE_BUFFER(ah);
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@ -1,6 +1,6 @@
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -2001,8 +2001,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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@@ -2009,8 +2009,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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REG_WRITE(ah, AR_OBS, 8);
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REG_WRITE(ah, AR_OBS, 8);
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if (ah->config.rx_intr_mitigation) {
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if (ah->config.rx_intr_mitigation) {
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@ -10,7 +10,7 @@
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -2843,7 +2843,7 @@ void ath9k_hw_apply_txpower(struct ath_h
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@@ -2851,7 +2851,7 @@ void ath9k_hw_apply_txpower(struct ath_h
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channel = chan->chan;
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channel = chan->chan;
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chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
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chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
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new_pwr = min_t(int, chan_pwr, reg->power_limit);
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new_pwr = min_t(int, chan_pwr, reg->power_limit);
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@ -94,7 +94,7 @@
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void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause);
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void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause);
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -1845,6 +1845,20 @@ fail:
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@@ -1853,6 +1853,20 @@ fail:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -115,7 +115,7 @@
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int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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struct ath9k_hw_cal_data *caldata, bool fastcc)
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struct ath9k_hw_cal_data *caldata, bool fastcc)
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{
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{
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@@ -2046,6 +2060,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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@@ -2054,6 +2068,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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}
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}
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ath9k_hw_apply_gpio_override(ah);
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ath9k_hw_apply_gpio_override(ah);
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@ -12,7 +12,7 @@
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -2439,17 +2439,25 @@ int ath9k_hw_fill_cap_info(struct ath_hw
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@@ -2447,17 +2447,25 @@ int ath9k_hw_fill_cap_info(struct ath_hw
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}
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}
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eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
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eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
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@ -0,0 +1,31 @@
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -44,7 +44,7 @@ static struct platform_device ath79_wmac
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},
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};
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-static void __init ar913x_wmac_setup(void)
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+static int ar913x_wmac_reset(void)
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{
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/* reset the WMAC */
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ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
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@@ -53,10 +53,19 @@ static void __init ar913x_wmac_setup(voi
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ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
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mdelay(10);
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+ return 0;
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+}
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+
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+static void __init ar913x_wmac_setup(void)
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+{
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+ ar913x_wmac_reset();
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+
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ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
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ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
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ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
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+
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+ ath79_wmac_data.external_reset = ar913x_wmac_reset;
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}
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@ -16,7 +16,7 @@
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static struct ath9k_platform_data ath79_wmac_data;
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static struct ath9k_platform_data ath79_wmac_data;
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static struct resource ath79_wmac_resources[] = {
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static struct resource ath79_wmac_resources[] = {
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@@ -151,7 +153,7 @@ static void qca955x_wmac_setup(void)
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@@ -160,7 +162,7 @@ static void qca955x_wmac_setup(void)
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ath79_wmac_data.is_clk_25mhz = true;
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ath79_wmac_data.is_clk_25mhz = true;
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}
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}
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@ -25,7 +25,7 @@
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{
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{
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if (soc_is_ar913x())
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if (soc_is_ar913x())
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ar913x_wmac_setup();
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ar913x_wmac_setup();
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@@ -168,5 +170,10 @@ void __init ath79_register_wmac(u8 *cal_
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@@ -177,5 +179,10 @@ void __init ath79_register_wmac(u8 *cal_
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memcpy(ath79_wmac_data.eeprom_data, cal_data,
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memcpy(ath79_wmac_data.eeprom_data, cal_data,
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sizeof(ath79_wmac_data.eeprom_data));
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sizeof(ath79_wmac_data.eeprom_data));
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@ -1,6 +1,6 @@
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--- a/arch/mips/ath79/dev-wmac.c
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -180,3 +180,9 @@ void __init ath79_register_wmac(u8 *cal_
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@@ -189,3 +189,9 @@ void __init ath79_register_wmac(u8 *cal_
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platform_device_register(&ath79_wmac_device);
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platform_device_register(&ath79_wmac_device);
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}
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}
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@ -1,6 +1,6 @@
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--- a/arch/mips/ath79/dev-wmac.c
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -156,6 +156,137 @@ static void qca955x_wmac_setup(void)
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@@ -165,6 +165,137 @@ static void qca955x_wmac_setup(void)
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ath79_wmac_data.is_clk_25mhz = true;
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ath79_wmac_data.is_clk_25mhz = true;
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}
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}
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@ -1,6 +1,6 @@
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--- a/arch/mips/ath79/dev-wmac.c
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -287,6 +287,16 @@ bool __init ar93xx_wmac_read_mac_address
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@@ -296,6 +296,16 @@ bool __init ar93xx_wmac_read_mac_address
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return ret;
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return ret;
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}
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}
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