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ramips: add second spi master sysclk
for mt7620, rt3883 and rt5350 Signed-off-by: Michael Lee <igvtee@gmail.com> SVN-Revision: 47616
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parent
3afe39af72
commit
12b6f4cf71
@ -0,0 +1,30 @@
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--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -434,6 +434,7 @@ void __init ralink_clk_init(void)
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ralink_clk_add("10000100.timer", periph_rate);
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ralink_clk_add("10000120.watchdog", periph_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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+ ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", periph_rate);
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ralink_clk_add("10000d00.uart1", periph_rate);
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ralink_clk_add("10000e00.uart2", periph_rate);
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--- a/arch/mips/ralink/rt305x.c
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+++ b/arch/mips/ralink/rt305x.c
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@@ -199,6 +199,7 @@ void __init ralink_clk_init(void)
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ralink_clk_add("cpu", cpu_rate);
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ralink_clk_add("sys", sys_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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+ ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000100.timer", wdt_rate);
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ralink_clk_add("10000120.watchdog", wdt_rate);
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ralink_clk_add("10000500.uart", uart_rate);
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--- a/arch/mips/ralink/rt3883.c
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+++ b/arch/mips/ralink/rt3883.c
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@@ -109,6 +109,7 @@ void __init ralink_clk_init(void)
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ralink_clk_add("10000120.watchdog", sys_rate);
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ralink_clk_add("10000500.uart", 40000000);
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ralink_clk_add("10000b00.spi", sys_rate);
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+ ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", 40000000);
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ralink_clk_add("10100000.ethernet", sys_rate);
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ralink_clk_add("10180000.wmac", 40000000);
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