realtek: add support for XikeStor SKS8300-8X
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XikeStor (Seeker) SKS8300-8X is a 8 ports Multi-Gig switch, based on
RTL9303.

Specification:

- SoC             : Realtek RTL9303
- RAM             : DDR3 512 MiB
- Flash           : SPI-NOR 32 MiB (Winbond W25Q256JVFIQ)
- Ethernet        : 8x 1/2.5/10 Gbps (SFP+)
- LEDs/Keys (GPIO): 1x/1x
- UART            : "Console" port on the front panel
  - type          : RS-232C
  - connector     : RJ-45
  - settings      : 9600n8
- Watchdog        : Diodes PT7A7514WE
- Power           : 12 VDC, 2 A

Flash instruction using initramfs image:

 1. Prepare TFTP server with an IP address "192.168.2.36"
 2. Connect your PC to Port1 on SKS8300-8X
 3. Power on SKS8300-8X and interrupt by Ctrl + B
 4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env"
 5. Login to the U-Boot CLI by "debug_unish_env" command
 6. Enable Port1 with the following commands

    rtk 10g 0 fiber1g (or fiber10g if 10GBase-*R)
    rtk ext-devInit 0
    rtk ext-pinSet 2 0

    Note: the last command sets tx-disable to low

 7. Download initramfs image from TFTP server

    tftpboot 0x82000000 <image name>

 8. Boot with the downloaded image

    bootm

 9. On the initramfs image, backup the stock firmware if needed
10. Upload (or download) sysupgrade image to the device
11. Erase "firmware" partition to cleanup JFFS2 of stock FW

    mtd erase firmware

12. Perform sysupgrade with the sysupgrade image
13. Wait ~120 sec to complete flashing

Notes:

- A kernel binary "nos.img" needs to be stored into JFFS2 filesystem
  using 4KiB erase block instead of 64KiB.

- PT7A7514WE is handled by hardware-assited system LED output
  (blinking).

- Some Japanese users asked to XikeStor about maximum power limit of
  SFP+ ports and got approximate criteria:

  - per port       : <=  2.9 W
  - total (8 ports): <= 15.8 W

MAC addresses:

eth0   : 84:E5:D8:xx:xx:37 (board-info (stock:"flash_raw"), 0x218 (hex))
(ports): 84:E5:D8:xx:xx:36 (board-info (stock:"flash_raw"), 0x1f1 (hex))

Reverting to stock firmware:

1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it

   Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
         erase size and not usable for SKS8300-8X

2. Create a directory for working
3. Download official firmware for SKS8300-8X from XikeStor's official
   website
4. Rename the downloaded firmware to "nos.img" and place it to the
   working directory
5. Create a JFFS2 filesystem binary with the working directory

   /path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
       -o nos.img.jffs2 -d /path/to/working/dir/

6. Upload the created JFFS2 filesystem binary to the device
7. Erase the "firmware" partition

   mtd erase firmware

8. Write the JFFS2 filesystem binary to the "firmware" partition

   mtd write /path/to/nos.img.jffs2 firmware

9. After writing, reboot the device by power cycle

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17593
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This commit is contained in:
INAGAKI Hiroshi 2024-05-24 13:38:02 +09:00 committed by Sander Vanheule
parent 9fc80b684c
commit 0dc0b98295
3 changed files with 455 additions and 0 deletions

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@ -54,6 +54,9 @@ tplink,t1600g-28ts-v3)
label_mac=$(get_mac_label) label_mac=$(get_mac_label)
lan_mac="$label_mac" lan_mac="$label_mac"
;; ;;
xikestor,sks8300-8x)
lan_mac=$(mtd_get_mac_binary board-info 0x1f1)
;;
*) *)
lan_mac=$(mtd_get_mac_ascii u-boot-env2 mac_start) lan_mac=$(mtd_get_mac_ascii u-boot-env2 mac_start)
lan_mac_end=$(mtd_get_mac_ascii u-boot-env2 mac_end) lan_mac_end=$(mtd_get_mac_ascii u-boot-env2 mac_end)

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@ -0,0 +1,434 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "rtl930x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "xikestor,sks8300-8x", "realtek,rtl930x-soc";
model = "XikeStor SKS8300-8X";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>, /* first 256 MiB */
<0x20000000 0x10000000>; /* remaining 256 MiB */
};
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
};
chosen {
stdout-path = "serial0:9600n8";
};
i2c_master: i2c@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
scl-pin = <8>;
sda-pin = <9>;
clock-frequency = <100000>;
};
i2c-mux {
compatible = "realtek,i2c-mux-rtl9300";
i2c-parent = <&i2c_master>;
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@0 {
reg = <0>;
scl-pin = <8>;
sda-pin = <9>;
};
i2c1: i2c@1 {
reg = <1>;
scl-pin = <8>;
sda-pin = <10>;
};
i2c2: i2c@2 {
reg = <2>;
scl-pin = <8>;
sda-pin = <11>;
};
i2c3: i2c@3 {
reg = <3>;
scl-pin = <8>;
sda-pin = <12>;
};
i2c4: i2c@4 {
reg = <4>;
scl-pin = <8>;
sda-pin = <13>;
};
i2c5: i2c@5 {
reg = <5>;
scl-pin = <8>;
sda-pin = <14>;
};
i2c6: i2c@6 {
reg = <6>;
scl-pin = <8>;
sda-pin = <15>;
};
i2c7: i2c@7 {
reg = <7>;
scl-pin = <8>;
sda-pin = <16>;
};
};
keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_sys: led-0 {
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
};
led_set {
compatible = "realtek,rtl9300-leds";
active-low;
/*
* LED set 0
*
* - LED[0](Green): 10G/LINK/ACT
* - LED[1](Amber): 10M/100M/1G/2.5G/5G/LINK/ACT
*/
led_set0 = <0x0baa 0x0a01>;
};
sfp0: sfp-p1 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
los-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2900>;
};
sfp1: sfp-p2 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
};
sfp2: sfp-p3 {
compatible = "sff,sfp";
i2c-bus = <&i2c2>;
los-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
};
sfp3: sfp-p4 {
compatible = "sff,sfp";
i2c-bus = <&i2c3>;
los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
sfp4: sfp-p5 {
compatible = "sff,sfp";
i2c-bus = <&i2c4>;
los-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
sfp5: sfp-p6 {
compatible = "sff,sfp";
i2c-bus = <&i2c5>;
los-gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 22 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
};
sfp6: sfp-p7 {
compatible = "sff,sfp";
i2c-bus = <&i2c6>;
los-gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
};
sfp7: sfp-p8 {
compatible = "sff,sfp";
i2c-bus = <&i2c7>;
los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2900>;
};
};
&mdio_aux {
status = "okay";
gpio1: gpio@0 {
compatible = "realtek,rtl8231";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
read-only;
};
/* "flash_raw" on stock */
partition@100000 {
label = "board-info";
reg = <0x100000 0x30000>;
read-only;
};
partition@130000 {
label = "syslog";
reg = <0x130000 0xd0000>;
read-only;
};
/* "flash_user" on stock */
partition@200000 {
compatible = "fixed-partitions";
label = "firmware";
reg = <0x200000 0x1e00000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x800000>;
};
partition@800000 {
label = "rootfs";
reg = <0x800000 0x1600000>;
};
};
};
};
};
&ethernet0 {
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
regmap = <&ethernet0>;
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <0>;
sds = <2>;
};
phy8: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <8>;
sds = <3>;
};
phy16: ethernet-phy@10 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <16>;
sds = <4>;
};
phy20: ethernet-phy@14 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <20>;
sds = <5>;
};
phy24: ethernet-phy@18 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <24>;
sds = <6>;
};
phy25: ethernet-phy@19 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <25>;
sds = <7>;
};
phy26: ethernet-phy@1a {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <26>;
sds = <8>;
};
phy27: ethernet-phy@1b {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <27>;
sds = <9>;
};
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
phy-handle = <&phy0>;
phy-mode = "10gbase-r";
sfp = <&sfp0>;
managed = "in-band-status";
led-set = <0>;
};
port@8 {
reg = <8>;
label = "lan2";
phy-handle = <&phy8>;
phy-mode = "10gbase-r";
sfp = <&sfp1>;
managed = "in-band-status";
led-set = <0>;
};
port@10 {
reg = <16>;
label = "lan3";
phy-handle = <&phy16>;
phy-mode = "10gbase-r";
sfp = <&sfp2>;
managed = "in-band-status";
led-set = <0>;
};
port@14 {
reg = <20>;
label = "lan4";
phy-handle = <&phy20>;
phy-mode = "10gbase-r";
sfp = <&sfp3>;
managed = "in-band-status";
led-set = <0>;
};
port@18 {
reg = <24>;
label = "lan5";
phy-handle = <&phy24>;
phy-mode = "10gbase-r";
sfp = <&sfp4>;
managed = "in-band-status";
led-set = <0>;
};
port@19 {
reg = <25>;
label = "lan6";
phy-handle = <&phy25>;
phy-mode = "10gbase-r";
sfp = <&sfp5>;
managed = "in-band-status";
led-set = <0>;
};
port@1a {
reg = <26>;
label = "lan7";
phy-handle = <&phy26>;
phy-mode = "10gbase-r";
sfp = <&sfp6>;
managed = "in-band-status";
led-set = <0>;
};
port@1b {
reg = <27>;
label = "lan8";
phy-handle = <&phy27>;
phy-mode = "10gbase-r";
sfp = <&sfp7>;
managed = "in-band-status";
led-set = <0>;
};
port@1c {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};

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@ -1,5 +1,23 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
define Build/xikestor-nosimg
$(STAGING_DIR_HOST)/bin/nosimg-enc -i $@ -o $@.new
mv $@.new $@
endef
define Device/xikestor_sks8300-8x
SOC := rtl9303
DEVICE_VENDOR := XikeStor
DEVICE_MODEL := SKS8300-8X
BLOCKSIZE := 64k
KERNEL_SIZE := 8192k
IMAGE_SIZE := 30720k
IMAGE/sysupgrade.bin := pad-extra 256 | append-kernel | xikestor-nosimg | \
jffs2 nos.img -e 4KiB -x lzma | pad-to $$$$(KERNEL_SIZE) | \
append-rootfs | pad-rootfs | append-metadata | check-size
endef
TARGET_DEVICES += xikestor_sks8300-8x
define Device/zyxel_xgs1250-12 define Device/zyxel_xgs1250-12
SOC := rtl9302 SOC := rtl9302
UIMAGE_MAGIC := 0x93001250 UIMAGE_MAGIC := 0x93001250