mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
mpc83xx: remove 2.6.32 support
SVN-Revision: 31420
This commit is contained in:
parent
884a4d47f0
commit
0d148cb63b
@ -1,222 +0,0 @@
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# CONFIG_40x is not set
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# CONFIG_44x is not set
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CONFIG_6xx=y
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# CONFIG_8xxx_WDT is not set
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# CONFIG_ADVANCED_OPTIONS is not set
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# CONFIG_ALTIVEC is not set
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# CONFIG_AMIGAONE is not set
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CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
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CONFIG_ARCH_HAS_ILOG2_U32=y
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CONFIG_ARCH_HAS_WALK_MEMORY=y
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
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# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
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CONFIG_ARCH_SUPPORTS_MSI=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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# CONFIG_ASP834x is not set
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CONFIG_ATA=y
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CONFIG_AUDIT_ARCH=y
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CONFIG_BITREVERSE=y
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# CONFIG_BOOTX_TEXT is not set
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CONFIG_BOUNCE=y
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CONFIG_BUBBATWO=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CFG80211_DEFAULT_PS_VALUE=0
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CONFIG_CMDLINE="console=ttyS0,115200"
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CONFIG_CMDLINE_BOOL=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEFAULT_UIMAGE=y
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CONFIG_DEVPORT=y
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# CONFIG_DMA_API_DEBUG is not set
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CONFIG_DTC=y
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# CONFIG_E200 is not set
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CONFIG_EARLY_PRINTK=y
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# CONFIG_EMBEDDED6xx is not set
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CONFIG_EXTRA_TARGETS="uImage.fit.mpc8377_wlan"
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CONFIG_FORCE_MAX_ZONEORDER=11
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# CONFIG_FSL_EMB_PERFMON is not set
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CONFIG_FSL_PCI=y
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CONFIG_FSL_PQ_MDIO=y
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CONFIG_FSL_SOC=y
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# CONFIG_FSL_ULI1575 is not set
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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# CONFIG_GENERIC_IOMAP is not set
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CONFIG_GENERIC_ISA_DMA=y
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CONFIG_GENERIC_NVRAM=y
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# CONFIG_GENERIC_TBSYNC is not set
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CONFIG_GENERIC_TIME_VSYSCALL=y
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# CONFIG_GEN_RTC is not set
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CONFIG_GIANFAR=y
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CONFIG_GPIOLIB=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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# CONFIG_HAS_RAPIDIO is not set
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_ATTRS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IOREMAP_PROT=y
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CONFIG_HAVE_KPROBES=y
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CONFIG_HAVE_KRETPROBES=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_LMB=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
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CONFIG_HW_RANDOM=y
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CONFIG_HZ=250
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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CONFIG_INITRAMFS_SOURCE=""
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# CONFIG_IOMMU_HELPER is not set
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CONFIG_IPIC=y
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# CONFIG_IRQSTACKS is not set
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CONFIG_IRQ_PER_CPU=y
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CONFIG_ISA_DMA_API=y
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CONFIG_KERNEL_START=0xc0000000
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# CONFIG_KMETER1 is not set
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# CONFIG_LEDS_GPIO is not set
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CONFIG_LOWMEM_SIZE=0x30000000
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CONFIG_MAX_ACTIVE_REGIONS=32
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# CONFIG_MMIO_NVRAM is not set
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# CONFIG_MPC5121_ADS is not set
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# CONFIG_MPC5121_GENERIC is not set
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CONFIG_MPC831x_RDB=y
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# CONFIG_MPC832x_MDS is not set
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# CONFIG_MPC832x_RDB is not set
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# CONFIG_MPC834x_ITX is not set
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# CONFIG_MPC834x_MDS is not set
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# CONFIG_MPC836x_MDS is not set
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# CONFIG_MPC836x_RDK is not set
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# CONFIG_MPC837x_MDS is not set
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CONFIG_MPC837x_RDB=y
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# CONFIG_MPC8xxx_GPIO is not set
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# CONFIG_MPIC is not set
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# CONFIG_MPIC_WEIRD is not set
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CONFIG_MTD_NAND=y
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# CONFIG_MTD_NAND_FSL_ELBC is not set
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# CONFIG_MTD_NAND_FSL_UPM is not set
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CONFIG_MTD_NAND_RB_PPC=y
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CONFIG_MTD_OF_PARTS=y
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CONFIG_MTD_PHYSMAP_OF=y
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# CONFIG_MV643XX_ETH is not set
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# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
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CONFIG_OF=y
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CONFIG_OF_DEVICE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_MDIO=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xc0000000
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CONFIG_PATA_RB_PPC=m
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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# CONFIG_PCIEAER_INJECT is not set
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CONFIG_PCIEPORTBUS=y
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# CONFIG_PCIE_ECRC is not set
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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# CONFIG_PERF_COUNTERS is not set
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# CONFIG_PERF_EVENTS is not set
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CONFIG_PHYLIB=y
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CONFIG_PHYSICAL_START=0x00000000
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CONFIG_PPC=y
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CONFIG_PPC32=y
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# CONFIG_PPC64 is not set
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# CONFIG_PPC_82xx is not set
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CONFIG_PPC_83xx=y
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# CONFIG_PPC_85xx is not set
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# CONFIG_PPC_86xx is not set
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# CONFIG_PPC_8xx is not set
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# CONFIG_PPC_970_NAP is not set
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CONFIG_PPC_BOOK3S=y
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CONFIG_PPC_BOOK3S_32=y
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# CONFIG_PPC_CELL is not set
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# CONFIG_PPC_CELL_NATIVE is not set
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# CONFIG_PPC_CHRP is not set
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# CONFIG_PPC_CLOCK is not set
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# CONFIG_PPC_DCR_MMIO is not set
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# CONFIG_PPC_DCR_NATIVE is not set
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CONFIG_PPC_DISABLE_WERROR=y
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# CONFIG_PPC_EARLY_DEBUG is not set
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CONFIG_PPC_FPU=y
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CONFIG_PPC_HAVE_PMU_SUPPORT=y
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# CONFIG_PPC_I8259 is not set
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# CONFIG_PPC_INDIRECT_IO is not set
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CONFIG_PPC_INDIRECT_PCI=y
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CONFIG_PPC_LIB_RHEAP=y
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# CONFIG_PPC_MM_SLICES is not set
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# CONFIG_PPC_MPC106 is not set
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# CONFIG_PPC_MPC52xx is not set
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CONFIG_PPC_MPC831x=y
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CONFIG_PPC_MPC834x=y
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CONFIG_PPC_MPC837x=y
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CONFIG_PPC_OF=y
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CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
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CONFIG_PPC_PCI_CHOICE=y
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# CONFIG_PPC_PMAC is not set
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# CONFIG_PPC_RTAS is not set
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CONFIG_PPC_STD_MMU=y
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CONFIG_PPC_STD_MMU_32=y
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CONFIG_PPC_UDBG_16550=y
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# CONFIG_PQ2ADS is not set
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CONFIG_PRINT_STACK_DEPTH=64
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CONFIG_PROC_DEVICETREE=y
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CONFIG_QE_GPIO=y
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CONFIG_QUICC_ENGINE=y
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CONFIG_RB_IOMAP=y
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CONFIG_RB_PPC=y
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CONFIG_RWSEM_XCHGADD_ALGORITHM=y
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# CONFIG_SATA_FSL is not set
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# CONFIG_SBC834x is not set
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CONFIG_SCHED_HRTICK=y
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CONFIG_SCHED_OMIT_FRAME_POINTER=y
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CONFIG_SCSI=y
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# CONFIG_SERIAL_8250_DETECT_IRQ is not set
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CONFIG_SERIAL_8250_EXTENDED=y
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# CONFIG_SERIAL_8250_MANY_PORTS is not set
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# CONFIG_SERIAL_8250_RSA is not set
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CONFIG_SERIAL_8250_SHARE_IRQ=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# CONFIG_SERIAL_QE is not set
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# CONFIG_SWIOTLB is not set
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CONFIG_TASK_SIZE=0xc0000000
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# CONFIG_TAU is not set
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# CONFIG_TREE_PREEMPT_RCU is not set
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CONFIG_TREE_RCU=y
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# CONFIG_UCC_GETH is not set
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CONFIG_VITESSE_PHY=y
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CONFIG_VITESSE_PHY_8601_SKEW=y
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CONFIG_WORD_SIZE=32
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# CONFIG_XILINX_EMACLITE is not set
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# CONFIG_YAFFS_9BYTE_TAGS is not set
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# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
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CONFIG_YAFFS_AUTO_YAFFS2=y
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# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
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# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
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# CONFIG_YAFFS_DOES_ECC is not set
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CONFIG_YAFFS_FS=y
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CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
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CONFIG_YAFFS_YAFFS1=y
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CONFIG_YAFFS_YAFFS2=y
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@ -1,209 +0,0 @@
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# CONFIG_40x is not set
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# CONFIG_44x is not set
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CONFIG_6xx=y
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# CONFIG_8xxx_WDT is not set
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# CONFIG_ADVANCED_OPTIONS is not set
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# CONFIG_ALTIVEC is not set
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# CONFIG_AMIGAONE is not set
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CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
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CONFIG_ARCH_HAS_ILOG2_U32=y
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CONFIG_ARCH_HAS_WALK_MEMORY=y
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
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# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
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CONFIG_ARCH_SUPPORTS_MSI=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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# CONFIG_ASP834x is not set
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CONFIG_ATA=y
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CONFIG_AUDIT_ARCH=y
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CONFIG_BITREVERSE=y
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# CONFIG_BOOTX_TEXT is not set
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CONFIG_BOUNCE=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CMDLINE_BOOL=y
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CONFIG_CMDLINE="console=ttyS0,115200"
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEFAULT_UIMAGE=y
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CONFIG_DEVPORT=y
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CONFIG_DTC=y
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# CONFIG_E200 is not set
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CONFIG_EARLY_PRINTK=y
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# CONFIG_EMBEDDED6xx is not set
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CONFIG_EXTRA_TARGETS="uImage.fit.mpc8377_wlan"
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CONFIG_FORCE_MAX_ZONEORDER=11
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# CONFIG_FSL_EMB_PERFMON is not set
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CONFIG_FSL_PCI=y
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CONFIG_FSL_PQ_MDIO=y
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CONFIG_FSL_SOC=y
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# CONFIG_FSL_ULI1575 is not set
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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# CONFIG_GENERIC_IOMAP is not set
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CONFIG_GENERIC_ISA_DMA=y
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CONFIG_GENERIC_NVRAM=y
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# CONFIG_GENERIC_TBSYNC is not set
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CONFIG_GENERIC_TIME_VSYSCALL=y
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# CONFIG_GEN_RTC is not set
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CONFIG_GIANFAR=y
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CONFIG_GPIOLIB=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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# CONFIG_HAS_RAPIDIO is not set
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IOREMAP_PROT=y
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CONFIG_HAVE_KPROBES=y
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CONFIG_HAVE_KRETPROBES=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_LMB=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_COUNTERS=y
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# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
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CONFIG_HW_RANDOM=y
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# CONFIG_HZ_100 is not set
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CONFIG_HZ=250
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CONFIG_HZ_250=y
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CONFIG_INITRAMFS_SOURCE=""
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# CONFIG_IOMMU_HELPER is not set
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CONFIG_IPIC=y
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CONFIG_IRQ_PER_CPU=y
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# CONFIG_IRQSTACKS is not set
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CONFIG_ISA_DMA_API=y
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CONFIG_KERNEL_START=0xc0000000
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# CONFIG_KMETER1 is not set
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# CONFIG_LEDS_GPIO is not set
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CONFIG_LOWMEM_SIZE=0x30000000
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CONFIG_MAC80211_DEFAULT_PS_VALUE=0
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# CONFIG_MMIO_NVRAM is not set
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# CONFIG_MPC5121_ADS is not set
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# CONFIG_MPC5121_GENERIC is not set
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# CONFIG_MPC831x_RDB is not set
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# CONFIG_MPC832x_MDS is not set
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# CONFIG_MPC832x_RDB is not set
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# CONFIG_MPC834x_ITX is not set
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# CONFIG_MPC834x_MDS is not set
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# CONFIG_MPC836x_MDS is not set
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# CONFIG_MPC836x_RDK is not set
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# CONFIG_MPC837x_MDS is not set
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CONFIG_MPC837x_RDB=y
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# CONFIG_MPC8xxx_GPIO is not set
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# CONFIG_MPIC is not set
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# CONFIG_MPIC_WEIRD is not set
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# CONFIG_MTD_NAND_FSL_ELBC is not set
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# CONFIG_MTD_NAND_FSL_UPM is not set
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CONFIG_MTD_NAND_RB_PPC=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_OF_PARTS=y
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CONFIG_MTD_PHYSMAP_OF=y
|
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# CONFIG_MV643XX_ETH is not set
|
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CONFIG_OF_DEVICE=y
|
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CONFIG_OF_GPIO=y
|
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CONFIG_OF_MDIO=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_PAGE_OFFSET=0xc0000000
|
||||
CONFIG_PATA_RB_PPC=m
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_PCIEAER_INJECT is not set
|
||||
CONFIG_PCIEAER=y
|
||||
# CONFIG_PCIE_ECRC is not set
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
# CONFIG_PERF_COUNTERS is not set
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYSICAL_START=0x00000000
|
||||
CONFIG_PPC32=y
|
||||
# CONFIG_PPC64 is not set
|
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# CONFIG_PPC_82xx is not set
|
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CONFIG_PPC_83xx=y
|
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# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_86xx is not set
|
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# CONFIG_PPC_8xx is not set
|
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# CONFIG_PPC_970_NAP is not set
|
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CONFIG_PPC_BOOK3S_32=y
|
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CONFIG_PPC_BOOK3S=y
|
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# CONFIG_PPC_CELL is not set
|
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# CONFIG_PPC_CELL_NATIVE is not set
|
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# CONFIG_PPC_CHRP is not set
|
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# CONFIG_PPC_CLOCK is not set
|
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# CONFIG_PPC_DCR_MMIO is not set
|
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# CONFIG_PPC_DCR_NATIVE is not set
|
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CONFIG_PPC_DISABLE_WERROR=y
|
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# CONFIG_PPC_EARLY_DEBUG is not set
|
||||
CONFIG_PPC_FPU=y
|
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CONFIG_PPC_HAVE_PMU_SUPPORT=y
|
||||
# CONFIG_PPC_I8259 is not set
|
||||
# CONFIG_PPC_INDIRECT_IO is not set
|
||||
CONFIG_PPC_INDIRECT_PCI=y
|
||||
CONFIG_PPC_LIB_RHEAP=y
|
||||
# CONFIG_PPC_MM_SLICES is not set
|
||||
# CONFIG_PPC_MPC106 is not set
|
||||
# CONFIG_PPC_MPC52xx is not set
|
||||
CONFIG_PPC_MPC834x=y
|
||||
CONFIG_PPC_MPC837x=y
|
||||
CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
|
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CONFIG_PPC_OF=y
|
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CONFIG_PPC_PCI_CHOICE=y
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
# CONFIG_PPC_RTAS is not set
|
||||
CONFIG_PPC_STD_MMU_32=y
|
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CONFIG_PPC_STD_MMU=y
|
||||
CONFIG_PPC_UDBG_16550=y
|
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CONFIG_PPC=y
|
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# CONFIG_PQ2ADS is not set
|
||||
CONFIG_PRINT_STACK_DEPTH=64
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_QE_GPIO=y
|
||||
CONFIG_QUICC_ENGINE=y
|
||||
CONFIG_RB_IOMAP=y
|
||||
CONFIG_RB_PPC=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SATA_FSL is not set
|
||||
# CONFIG_SBC834x is not set
|
||||
CONFIG_SCHED_HRTICK=y
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
# CONFIG_SERIAL_8250_MANY_PORTS is not set
|
||||
# CONFIG_SERIAL_8250_RSA is not set
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_SERIAL_QE is not set
|
||||
# CONFIG_SWIOTLB is not set
|
||||
CONFIG_TASK_SIZE=0xc0000000
|
||||
# CONFIG_TAU is not set
|
||||
# CONFIG_UCC_GETH is not set
|
||||
CONFIG_WORD_SIZE=32
|
||||
# CONFIG_YAFFS_9BYTE_TAGS is not set
|
||||
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
|
||||
CONFIG_YAFFS_AUTO_YAFFS2=y
|
||||
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
|
||||
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
|
||||
# CONFIG_YAFFS_DOES_ECC is not set
|
||||
CONFIG_YAFFS_FS=y
|
||||
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
|
||||
CONFIG_YAFFS_YAFFS1=y
|
||||
CONFIG_YAFFS_YAFFS2=y
|
File diff suppressed because it is too large
Load Diff
@ -1,30 +0,0 @@
|
||||
--- a/arch/powerpc/boot/wrapper
|
||||
+++ b/arch/powerpc/boot/wrapper
|
||||
@@ -43,6 +43,9 @@ gzip=.gz
|
||||
# cross-compilation prefix
|
||||
CROSS=
|
||||
|
||||
+# mkimage wrapper script
|
||||
+MKIMAGE=$srctree/scripts/mkuboot.sh
|
||||
+
|
||||
# directory for object and other files used by this script
|
||||
object=arch/powerpc/boot
|
||||
objbin=$object
|
||||
@@ -263,7 +266,7 @@ membase=`${CROSS}objdump -p "$kernel" |
|
||||
case "$platform" in
|
||||
uboot)
|
||||
rm -f "$ofile"
|
||||
- mkimage -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \
|
||||
+ ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \
|
||||
$uboot_version -d "$vmz" "$ofile"
|
||||
if [ -z "$cacheit" ]; then
|
||||
rm -f "$vmz"
|
||||
@@ -323,7 +326,7 @@ coff)
|
||||
;;
|
||||
cuboot*)
|
||||
gzip -f -9 "$ofile"
|
||||
- mkimage -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
|
||||
+ ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
|
||||
$uboot_version -d "$ofile".gz "$ofile"
|
||||
;;
|
||||
treeboot*)
|
@ -1,94 +0,0 @@
|
||||
--- a/arch/powerpc/Makefile
|
||||
+++ b/arch/powerpc/Makefile
|
||||
@@ -157,7 +157,8 @@ drivers-$(CONFIG_OPROFILE) += arch/power
|
||||
# Default to zImage, override when needed
|
||||
all: zImage
|
||||
|
||||
-BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
|
||||
+BOOT_TARGETS = zImage zImage.initrd uImage uImage.fit.% zImage% dtbImage% \
|
||||
+ treeImage.% cuImage.% simpleImage.%
|
||||
|
||||
PHONY += $(BOOT_TARGETS)
|
||||
|
||||
@@ -184,6 +185,7 @@ define archhelp
|
||||
@echo '* zImage - Build default images selected by kernel config'
|
||||
@echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
|
||||
@echo ' uImage - U-Boot native image format'
|
||||
+ @echo ' uImage.fit.<dt> - U-Boot Flattened Image Tree image format'
|
||||
@echo ' cuImage.<dt> - Backwards compatible U-Boot image for older'
|
||||
@echo ' versions which do not support device trees'
|
||||
@echo ' dtbImage.<dt> - zImage with an embedded device tree blob'
|
||||
--- a/arch/powerpc/boot/.gitignore
|
||||
+++ b/arch/powerpc/boot/.gitignore
|
||||
@@ -19,6 +19,7 @@ kernel-vmlinux.strip.c
|
||||
kernel-vmlinux.strip.gz
|
||||
mktree
|
||||
uImage
|
||||
+uImage.fit.*
|
||||
cuImage.*
|
||||
dtbImage.*
|
||||
treeImage.*
|
||||
--- a/arch/powerpc/boot/Makefile
|
||||
+++ b/arch/powerpc/boot/Makefile
|
||||
@@ -308,6 +308,9 @@ $(obj)/zImage.iseries: vmlinux
|
||||
$(obj)/uImage: vmlinux $(wrapperbits)
|
||||
$(call if_changed,wrap,uboot)
|
||||
|
||||
+$(obj)/uImage.fit.%: vmlinux $(obj)/%.dtb $(wrapperbits)
|
||||
+ $(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb)
|
||||
+
|
||||
$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
|
||||
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
|
||||
|
||||
@@ -347,7 +350,7 @@ install: $(CONFIGURE) $(addprefix $(obj)
|
||||
|
||||
# anything not in $(targets)
|
||||
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
|
||||
- zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
|
||||
+ uImage.* zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
|
||||
zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
|
||||
simpleImage.* otheros.bld *.dtb
|
||||
|
||||
--- a/arch/powerpc/boot/wrapper
|
||||
+++ b/arch/powerpc/boot/wrapper
|
||||
@@ -46,6 +46,9 @@ CROSS=
|
||||
# mkimage wrapper script
|
||||
MKIMAGE=$srctree/scripts/mkuboot.sh
|
||||
|
||||
+# script to generate an .its file for uImage.fit.* images
|
||||
+MKITS=$srctree/scripts/mkits.sh
|
||||
+
|
||||
# directory for object and other files used by this script
|
||||
object=arch/powerpc/boot
|
||||
objbin=$object
|
||||
@@ -157,7 +160,7 @@ coff)
|
||||
lds=$object/zImage.coff.lds
|
||||
link_address='0x500000'
|
||||
;;
|
||||
-miboot|uboot)
|
||||
+miboot|uboot|uboot.fit)
|
||||
# miboot and U-boot want just the bare bits, not an ELF binary
|
||||
ext=bin
|
||||
objflags="-O binary"
|
||||
@@ -273,6 +276,21 @@ uboot)
|
||||
fi
|
||||
exit 0
|
||||
;;
|
||||
+uboot.fit)
|
||||
+ rm -f "$ofile"
|
||||
+ ${MKITS} -A ppc -C gzip -a $membase -e $membase -v $version \
|
||||
+ -d "$srctree/$dtb" -k "$srctree/$vmz" -o "$object/uImage.its"
|
||||
+
|
||||
+ # mkimage calls dtc for FIT images so use kernel dtc if necessary
|
||||
+ export PATH=$PATH:$srctree/scripts/dtc
|
||||
+
|
||||
+ ${MKIMAGE} -f "$object/uImage.its" "$ofile"
|
||||
+ rm "$object/uImage.its"
|
||||
+ if [ -z "$cacheit" ]; then
|
||||
+ rm -f "$vmz"
|
||||
+ fi
|
||||
+ exit 0
|
||||
+ ;;
|
||||
esac
|
||||
|
||||
addsec() {
|
@ -1,116 +0,0 @@
|
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -51,6 +51,12 @@ config VITESSE_PHY
|
||||
---help---
|
||||
Currently supports the vsc8244
|
||||
|
||||
+config VITESSE_PHY_8601_SKEW
|
||||
+ bool "Enable skew timing to vsc8601"
|
||||
+ depends on VITESSE_PHY
|
||||
+ ---help---
|
||||
+ Apply clock timing adjustments for vsc8601
|
||||
+
|
||||
config SMSC_PHY
|
||||
tristate "Drivers for SMSC PHYs"
|
||||
---help---
|
||||
--- a/drivers/net/phy/vitesse.c
|
||||
+++ b/drivers/net/phy/vitesse.c
|
||||
@@ -26,6 +26,11 @@
|
||||
#define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
|
||||
#define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
|
||||
|
||||
+/* EXT_CON1 Register values for VSC8601 */
|
||||
+#define MII_VSC8601_EXTCON1_INIT 0x0000
|
||||
+#define MII_VSC8601_EXTCON1_SKEW 0x0100
|
||||
+#define MII_VSC8601_EXTCON1_ACTIPHY 0x0020
|
||||
+
|
||||
/* Vitesse Interrupt Mask Register */
|
||||
#define MII_VSC8244_IMASK 0x19
|
||||
#define MII_VSC8244_IMASK_IEN 0x8000
|
||||
@@ -88,6 +93,30 @@ static int vsc824x_config_init(struct ph
|
||||
return err;
|
||||
}
|
||||
|
||||
+static int vsc8601_config_init(struct phy_device *phydev)
|
||||
+{
|
||||
+ int err;
|
||||
+ int extcon;
|
||||
+
|
||||
+ err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
|
||||
+ MII_VSC8244_AUXCONSTAT_INIT);
|
||||
+
|
||||
+ if (err < 0)
|
||||
+ return err;
|
||||
+
|
||||
+#ifdef CONFIG_VITESSE_PHY_8601_SKEW
|
||||
+ extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
|
||||
+ if (err < 0)
|
||||
+ return err;
|
||||
+
|
||||
+ extcon |= MII_VSC8601_EXTCON1_SKEW;
|
||||
+
|
||||
+ err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
|
||||
+#endif
|
||||
+
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
static int vsc824x_ack_interrupt(struct phy_device *phydev)
|
||||
{
|
||||
int err = 0;
|
||||
@@ -143,6 +172,21 @@ static struct phy_driver vsc8244_driver
|
||||
.driver = { .owner = THIS_MODULE,},
|
||||
};
|
||||
|
||||
+/* Vitesse 8601 */
|
||||
+static struct phy_driver vsc8601_driver = {
|
||||
+ .phy_id = 0x00070420,
|
||||
+ .name = "Vitesse VSC8601",
|
||||
+ .phy_id_mask = 0x000ffff8,
|
||||
+ .features = PHY_GBIT_FEATURES,
|
||||
+ .flags = PHY_HAS_INTERRUPT,
|
||||
+ .config_init = &vsc8601_config_init,
|
||||
+ .config_aneg = &genphy_config_aneg,
|
||||
+ .read_status = &genphy_read_status,
|
||||
+ .ack_interrupt = &vsc824x_ack_interrupt,
|
||||
+ .config_intr = &vsc82xx_config_intr,
|
||||
+ .driver = { .owner = THIS_MODULE,},
|
||||
+};
|
||||
+
|
||||
static int vsc8221_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int err;
|
||||
@@ -176,10 +220,23 @@ static int __init vsc82xx_init(void)
|
||||
|
||||
err = phy_driver_register(&vsc8244_driver);
|
||||
if (err < 0)
|
||||
- return err;
|
||||
+ goto err;
|
||||
+
|
||||
err = phy_driver_register(&vsc8221_driver);
|
||||
if (err < 0)
|
||||
- phy_driver_unregister(&vsc8244_driver);
|
||||
+ goto err1;
|
||||
+
|
||||
+ err = phy_driver_register(&vsc8601_driver);
|
||||
+ if (err < 0)
|
||||
+ goto err2;
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err2:
|
||||
+ phy_driver_unregister(&vsc8221_driver);
|
||||
+err1:
|
||||
+ phy_driver_unregister(&vsc8244_driver);
|
||||
+err:
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -187,6 +244,7 @@ static void __exit vsc82xx_exit(void)
|
||||
{
|
||||
phy_driver_unregister(&vsc8244_driver);
|
||||
phy_driver_unregister(&vsc8221_driver);
|
||||
+ phy_driver_unregister(&vsc8601_driver);
|
||||
}
|
||||
|
||||
module_init(vsc82xx_init);
|
@ -1,18 +0,0 @@
|
||||
--- a/drivers/net/gianfar.c
|
||||
+++ b/drivers/net/gianfar.c
|
||||
@@ -334,7 +334,14 @@ static int gfar_probe(struct of_device *
|
||||
/* We need to delay at least 3 TX clocks */
|
||||
udelay(2);
|
||||
|
||||
- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
|
||||
+ /*
|
||||
+ * Do not enable flow control on chips earlier than rev 1.1,
|
||||
+ * because of the eTSEC27 erratum
|
||||
+ */
|
||||
+ tempval = 0;
|
||||
+ if (mfspr(SPRN_SVR) & 0xffff >= 0x0011)
|
||||
+ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
|
||||
+
|
||||
gfar_write(&priv->regs->maccfg1, tempval);
|
||||
|
||||
/* Initialize MACCFG2. */
|
Loading…
Reference in New Issue
Block a user