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kernel: update kernel 4.4 to version 4.4.13
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This commit is contained in:
parent
1da87516e5
commit
0aa6c7df60
@ -4,11 +4,11 @@ LINUX_RELEASE?=1
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LINUX_VERSION-3.18 = .29
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LINUX_VERSION-4.1 = .20
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LINUX_VERSION-4.4 = .12
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LINUX_VERSION-4.4 = .13
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LINUX_KERNEL_MD5SUM-3.18.29 = b25737a0bc98e80d12200de93f239c28
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LINUX_KERNEL_MD5SUM-4.1.20 = 075c38a3a23ca5bc80437b13606df00a
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LINUX_KERNEL_MD5SUM-4.4.12 = eed37d7fa5c2095f42f62803fa077c33
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LINUX_KERNEL_MD5SUM-4.4.13 = d70b6959d8db61bcea7070c089aace9b
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ifdef KERNEL_PATCHVER
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LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
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@ -1,49 +0,0 @@
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From f1ba020af5076172c9d29006a747ccf40027fedc Mon Sep 17 00:00:00 2001
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Message-Id: <f1ba020af5076172c9d29006a747ccf40027fedc.1458840219.git.mschiffer@universe-factory.net>
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From: Matthias Schiffer <mschiffer@universe-factory.net>
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Date: Thu, 24 Mar 2016 15:34:05 +0100
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Subject: [PATCH] MIPS: ath79: make bootconsole wait for both THRE and TEMT
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This makes the ath79 bootconsole behave the same way as the generic 8250
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bootconsole.
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Also waiting for TEMT (transmit buffer is empty) instead of just THRE
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(transmit buffer is not full) ensures that all characters have been
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transmitted before the real serial driver starts reconfiguring the serial
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controller (which would sometimes result in garbage being transmitted.)
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This change does not cause a visible performance loss.
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In addition, this seems to fix a hang observed in certain configurations on
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many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver.
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A more complete follow-up patch will disable 8250 autoconfig for ath79
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altogether (the serial controller is detected as a 16550A, which is not
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fully compatible with the ath79 serial, and the autoconfig may lead to
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undefined behavior on ath79.)
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
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---
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arch/mips/ath79/early_printk.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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--- a/arch/mips/ath79/early_printk.c
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+++ b/arch/mips/ath79/early_printk.c
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@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(voi
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} while (1);
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}
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+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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+
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static void prom_putchar_ar71xx(unsigned char ch)
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{
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void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
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- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
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+ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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__raw_writel(ch, base + UART_TX * 4);
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- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
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+ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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}
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static void prom_putchar_ar933x(unsigned char ch)
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@ -1,7 +1,7 @@
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--- a/arch/mips/ath25/Makefile
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+++ b/arch/mips/ath25/Makefile
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@@ -8,7 +8,7 @@
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# Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
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# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
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#
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-obj-y += board.o prom.o devices.o
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@ -17,7 +17,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1154,22 +1154,24 @@ static int bcm2835_clock_is_on(struct cl
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@@ -1164,22 +1164,24 @@ static int bcm2835_clock_is_on(struct cl
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static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
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unsigned long rate,
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@ -48,9 +48,9 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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+ div += unused_frac_mask + 1;
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+ div &= ~unused_frac_mask;
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/* Clamp to the limits. */
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div = max(div, unused_frac_mask + 1);
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@@ -1208,7 +1210,7 @@ static long bcm2835_clock_round_rate(str
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/* clamp to min divider of 1 */
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div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
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@@ -1219,7 +1221,7 @@ static long bcm2835_clock_round_rate(str
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unsigned long *parent_rate)
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{
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struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
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@ -59,7 +59,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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return bcm2835_clock_rate_from_divisor(clock, *parent_rate, div);
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}
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@@ -1277,7 +1279,7 @@ static int bcm2835_clock_set_rate(struct
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@@ -1288,7 +1290,7 @@ static int bcm2835_clock_set_rate(struct
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struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
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struct bcm2835_cprman *cprman = clock->cprman;
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const struct bcm2835_clock_data *data = clock->data;
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@ -24,7 +24,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1205,16 +1205,6 @@ static long bcm2835_clock_rate_from_divi
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@@ -1216,16 +1216,6 @@ static long bcm2835_clock_rate_from_divi
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return temp;
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}
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@ -41,7 +41,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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@@ -1286,13 +1276,75 @@ static int bcm2835_clock_set_rate(struct
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@@ -1297,13 +1287,75 @@ static int bcm2835_clock_set_rate(struct
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return 0;
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}
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@ -118,7 +118,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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};
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static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
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@@ -1308,7 +1360,9 @@ static const struct clk_ops bcm2835_vpu_
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@@ -1319,7 +1371,9 @@ static const struct clk_ops bcm2835_vpu_
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.is_prepared = bcm2835_vpu_clock_is_on,
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.recalc_rate = bcm2835_clock_get_rate,
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.set_rate = bcm2835_clock_set_rate,
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@ -129,7 +129,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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};
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static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
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@@ -1402,45 +1456,23 @@ static struct clk *bcm2835_register_cloc
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@@ -1413,45 +1467,23 @@ static struct clk *bcm2835_register_cloc
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{
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struct bcm2835_clock *clock;
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struct clk_init_data init;
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@ -33,7 +33,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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struct bcm2835_pll {
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struct clk_hw hw;
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struct bcm2835_cprman *cprman;
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@@ -1590,6 +1600,9 @@ static int bcm2835_clk_probe(struct plat
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@@ -1601,6 +1611,9 @@ static int bcm2835_clk_probe(struct plat
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cprman->regs + CM_PERIICTL, CM_GATE_BIT,
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0, &cprman->regs_lock);
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@ -1,43 +0,0 @@
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From 4d4b769727386c6a1b7274e3083cc6b24364b4fa Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Mon, 29 Feb 2016 11:39:17 +0000
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Subject: [PATCH 256/381] clk: bcm2835: pll_off should only update
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CM_PLL_ANARST
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bcm2835_pll_off is currently assigning CM_PLL_ANARST to the control
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register, which may lose the other bits that are currently set by the
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clock dividers.
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It also now locks during the read/modify/write cycle of both
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registers.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the
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audio domain clocks")
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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(cherry picked from commit 6727f086cfe4ddcc651eb2bf4301abfcf619be06)
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---
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drivers/clk/bcm/clk-bcm2835.c | 10 ++++++++--
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1 file changed, 8 insertions(+), 2 deletions(-)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -913,8 +913,14 @@ static void bcm2835_pll_off(struct clk_h
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struct bcm2835_cprman *cprman = pll->cprman;
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const struct bcm2835_pll_data *data = pll->data;
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- cprman_write(cprman, data->cm_ctrl_reg, CM_PLL_ANARST);
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- cprman_write(cprman, data->a2w_ctrl_reg, A2W_PLL_CTRL_PWRDN);
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+ spin_lock(&cprman->regs_lock);
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+ cprman_write(cprman, data->cm_ctrl_reg,
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+ cprman_read(cprman, data->cm_ctrl_reg) |
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+ CM_PLL_ANARST);
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) |
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+ A2W_PLL_CTRL_PWRDN);
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+ spin_unlock(&cprman->regs_lock);
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}
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static int bcm2835_pll_on(struct clk_hw *hw)
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@ -1,36 +0,0 @@
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From 260572944700ab13fa3f7a68a387556220cef277 Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Mon, 29 Feb 2016 11:39:20 +0000
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Subject: [PATCH 257/381] clk: bcm2835: divider value has to be 1 or more
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Current clamping of a normal divider allows a value < 1 to be valid.
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A divider of < 1 would actually only be possible if we had a PLL...
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So this patch clamps the divider to 1.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the
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audio domain clocks")
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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(cherry picked from commit 997f16bd5d2e9b3456027f96fcadfe1e2bf12f4e)
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---
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drivers/clk/bcm/clk-bcm2835.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1202,8 +1202,9 @@ static u32 bcm2835_clock_choose_div(stru
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div += unused_frac_mask + 1;
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div &= ~unused_frac_mask;
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- /* Clamp to the limits. */
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- div = max(div, unused_frac_mask + 1);
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+ /* clamp to min divider of 1 */
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+ div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
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+ /* clamp to the highest possible fractional divider */
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div = min_t(u32, div, GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1,
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CM_DIV_FRAC_BITS - data->frac_bits));
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@ -67,7 +67,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
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};
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struct bcm2835_pll {
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@@ -1192,7 +1196,7 @@ static u32 bcm2835_clock_choose_div(stru
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@@ -1196,7 +1200,7 @@ static u32 bcm2835_clock_choose_div(stru
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GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
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u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
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u64 rem;
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@ -76,7 +76,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
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rem = do_div(temp, rate);
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div = temp;
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@@ -1202,11 +1206,23 @@ static u32 bcm2835_clock_choose_div(stru
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@@ -1206,11 +1210,23 @@ static u32 bcm2835_clock_choose_div(stru
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div += unused_frac_mask + 1;
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div &= ~unused_frac_mask;
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@ -105,7 +105,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
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return div;
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}
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@@ -1300,9 +1316,26 @@ static int bcm2835_clock_set_rate(struct
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@@ -1304,9 +1320,26 @@ static int bcm2835_clock_set_rate(struct
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struct bcm2835_cprman *cprman = clock->cprman;
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const struct bcm2835_clock_data *data = clock->data;
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u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false);
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@ -33,7 +33,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
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const char *osc_name;
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struct clk_onecell_data onecell;
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@@ -1340,7 +1337,7 @@ static int bcm2835_clock_set_rate(struct
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@@ -1344,7 +1341,7 @@ static int bcm2835_clock_set_rate(struct
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}
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static int bcm2835_clock_determine_rate(struct clk_hw *hw,
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@ -42,7 +42,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
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{
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struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
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struct clk_hw *parent, *best_parent = NULL;
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@@ -1398,7 +1395,6 @@ static u8 bcm2835_clock_get_parent(struc
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@@ -1402,7 +1399,6 @@ static u8 bcm2835_clock_get_parent(struc
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return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
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}
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@ -58,7 +58,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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/*
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* These are fixed clocks. They're probably not all root clocks and it may
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* be possible to turn them on and off but until this is mapped out better
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@@ -1040,6 +1062,36 @@ static int bcm2835_pll_set_rate(struct c
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@@ -1044,6 +1066,36 @@ static int bcm2835_pll_set_rate(struct c
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return 0;
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}
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@ -95,7 +95,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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static const struct clk_ops bcm2835_pll_clk_ops = {
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.is_prepared = bcm2835_pll_is_on,
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.prepare = bcm2835_pll_on,
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@@ -1047,6 +1099,7 @@ static const struct clk_ops bcm2835_pll_
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@@ -1051,6 +1103,7 @@ static const struct clk_ops bcm2835_pll_
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.recalc_rate = bcm2835_pll_get_rate,
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.set_rate = bcm2835_pll_set_rate,
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.round_rate = bcm2835_pll_round_rate,
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@ -103,7 +103,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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};
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struct bcm2835_pll_divider {
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@@ -1147,6 +1200,26 @@ static int bcm2835_pll_divider_set_rate(
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@@ -1151,6 +1204,26 @@ static int bcm2835_pll_divider_set_rate(
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return 0;
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}
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@ -130,7 +130,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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static const struct clk_ops bcm2835_pll_divider_clk_ops = {
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.is_prepared = bcm2835_pll_divider_is_on,
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.prepare = bcm2835_pll_divider_on,
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@@ -1154,6 +1227,7 @@ static const struct clk_ops bcm2835_pll_
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@@ -1158,6 +1231,7 @@ static const struct clk_ops bcm2835_pll_
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.recalc_rate = bcm2835_pll_divider_get_rate,
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.set_rate = bcm2835_pll_divider_set_rate,
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.round_rate = bcm2835_pll_divider_round_rate,
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@ -138,7 +138,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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};
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/*
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@@ -1395,6 +1469,31 @@ static u8 bcm2835_clock_get_parent(struc
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@@ -1399,6 +1473,31 @@ static u8 bcm2835_clock_get_parent(struc
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return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
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}
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@ -170,7 +170,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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static const struct clk_ops bcm2835_clock_clk_ops = {
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.is_prepared = bcm2835_clock_is_on,
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.prepare = bcm2835_clock_on,
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@@ -1404,6 +1503,7 @@ static const struct clk_ops bcm2835_cloc
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@@ -1408,6 +1507,7 @@ static const struct clk_ops bcm2835_cloc
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.determine_rate = bcm2835_clock_determine_rate,
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.set_parent = bcm2835_clock_set_parent,
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.get_parent = bcm2835_clock_get_parent,
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@ -178,7 +178,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
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};
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static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
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@@ -1422,6 +1522,7 @@ static const struct clk_ops bcm2835_vpu_
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@@ -1426,6 +1526,7 @@ static const struct clk_ops bcm2835_vpu_
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.determine_rate = bcm2835_clock_determine_rate,
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.set_parent = bcm2835_clock_set_parent,
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.get_parent = bcm2835_clock_get_parent,
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@ -57,7 +57,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
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struct bcm2835_pll {
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struct clk_hw hw;
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struct bcm2835_cprman *cprman;
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||||
@@ -1654,14 +1673,81 @@ static struct clk *bcm2835_register_cloc
|
||||
@@ -1658,14 +1677,81 @@ static struct clk *bcm2835_register_cloc
|
||||
return devm_clk_register(cprman->dev, &clock->hw);
|
||||
}
|
||||
|
||||
@ -140,7 +140,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
if (!cprman)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -1678,80 +1764,15 @@ static int bcm2835_clk_probe(struct plat
|
||||
@@ -1682,80 +1768,15 @@ static int bcm2835_clk_probe(struct plat
|
||||
|
||||
platform_set_drvdata(pdev, cprman);
|
||||
|
||||
|
@ -474,7 +474,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
struct bcm2835_pll {
|
||||
struct clk_hw hw;
|
||||
struct bcm2835_cprman *cprman;
|
||||
@@ -1590,7 +1173,7 @@ bcm2835_register_pll_divider(struct bcm2
|
||||
@@ -1594,7 +1177,7 @@ bcm2835_register_pll_divider(struct bcm2
|
||||
|
||||
memset(&init, 0, sizeof(init));
|
||||
|
||||
@ -483,7 +483,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
init.num_parents = 1;
|
||||
init.name = divider_name;
|
||||
init.ops = &bcm2835_pll_divider_clk_ops;
|
||||
@@ -1689,50 +1272,401 @@ struct bcm2835_clk_desc {
|
||||
@@ -1693,50 +1276,401 @@ struct bcm2835_clk_desc {
|
||||
const void *data;
|
||||
};
|
||||
|
||||
|
@ -17,7 +17,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -1634,6 +1634,13 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1638,6 +1638,13 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_HSMDIV,
|
||||
.int_bits = 4,
|
||||
.frac_bits = 8),
|
||||
|
@ -14,7 +14,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -1383,6 +1383,22 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1387,6 +1387,22 @@ static const struct bcm2835_clk_desc clk
|
||||
.load_mask = CM_PLLA_LOADPER,
|
||||
.hold_mask = CM_PLLA_HOLDPER,
|
||||
.fixed_divider = 1),
|
||||
@ -37,7 +37,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
/* PLLB is used for the ARM's clock. */
|
||||
[BCM2835_PLLB] = REGISTER_PLL(
|
||||
@@ -1497,6 +1513,22 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1501,6 +1517,22 @@ static const struct bcm2835_clk_desc clk
|
||||
.load_mask = CM_PLLD_LOADPER,
|
||||
.hold_mask = CM_PLLD_HOLDPER,
|
||||
.fixed_divider = 1),
|
||||
|
@ -26,7 +26,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
#define CM_EMMCCTL 0x1c0
|
||||
#define CM_EMMCDIV 0x1c4
|
||||
|
||||
@@ -1606,6 +1608,12 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1610,6 +1612,12 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_TSENSDIV,
|
||||
.int_bits = 5,
|
||||
.frac_bits = 0),
|
||||
@ -39,7 +39,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
/* clocks with vpu parent mux */
|
||||
[BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
|
||||
@@ -1620,6 +1628,7 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1624,6 +1632,7 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_ISPDIV,
|
||||
.int_bits = 4,
|
||||
.frac_bits = 8),
|
||||
@ -47,7 +47,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
/*
|
||||
* Secondary SDRAM clock. Used for low-voltage modes when the PLL
|
||||
* in the SDRAM controller can't be used.
|
||||
@@ -1651,6 +1660,36 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1655,6 +1664,36 @@ static const struct bcm2835_clk_desc clk
|
||||
.is_vpu_clock = true),
|
||||
|
||||
/* clocks with per parent mux */
|
||||
@ -84,7 +84,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
/* Arasan EMMC clock */
|
||||
[BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
|
||||
@@ -1659,6 +1698,29 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1663,6 +1702,29 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_EMMCDIV,
|
||||
.int_bits = 4,
|
||||
.frac_bits = 8),
|
||||
@ -114,7 +114,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
/* HDMI state machine */
|
||||
[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
|
||||
.name = "hsm",
|
||||
@@ -1680,12 +1742,26 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1684,12 +1746,26 @@ static const struct bcm2835_clk_desc clk
|
||||
.int_bits = 12,
|
||||
.frac_bits = 12,
|
||||
.is_mash_clock = true),
|
||||
@ -141,7 +141,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
/* TV encoder clock. Only operating frequency is 108Mhz. */
|
||||
[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
|
||||
.name = "vec",
|
||||
@@ -1694,6 +1770,20 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1698,6 +1774,20 @@ static const struct bcm2835_clk_desc clk
|
||||
.int_bits = 4,
|
||||
.frac_bits = 0),
|
||||
|
||||
|
@ -19,9 +19,9 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -557,6 +557,10 @@ static int bcm2835_pll_on(struct clk_hw
|
||||
const struct bcm2835_pll_data *data = pll->data;
|
||||
ktime_t timeout;
|
||||
@@ -561,6 +561,10 @@ static int bcm2835_pll_on(struct clk_hw
|
||||
cprman_read(cprman, data->a2w_ctrl_reg) &
|
||||
~A2W_PLL_CTRL_PWRDN);
|
||||
|
||||
+ cprman_write(cprman, data->a2w_ctrl_reg,
|
||||
+ cprman_read(cprman, data->a2w_ctrl_reg) &
|
||||
|
@ -27,7 +27,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
bool is_vpu_clock;
|
||||
bool is_mash_clock;
|
||||
};
|
||||
@@ -1242,7 +1244,7 @@ static struct clk *bcm2835_register_cloc
|
||||
@@ -1246,7 +1248,7 @@ static struct clk *bcm2835_register_cloc
|
||||
init.parent_names = parents;
|
||||
init.num_parents = data->num_mux_parents;
|
||||
init.name = data->name;
|
||||
@ -36,7 +36,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
if (data->is_vpu_clock) {
|
||||
init.ops = &bcm2835_vpu_clock_clk_ops;
|
||||
@@ -1661,6 +1663,7 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1665,6 +1667,7 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_VPUDIV,
|
||||
.int_bits = 12,
|
||||
.frac_bits = 8,
|
||||
|
@ -20,7 +20,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -1246,6 +1246,15 @@ static struct clk *bcm2835_register_cloc
|
||||
@@ -1250,6 +1250,15 @@ static struct clk *bcm2835_register_cloc
|
||||
init.name = data->name;
|
||||
init.flags = data->flags | CLK_IGNORE_UNUSED;
|
||||
|
||||
@ -36,7 +36,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
if (data->is_vpu_clock) {
|
||||
init.ops = &bcm2835_vpu_clock_clk_ops;
|
||||
} else {
|
||||
@@ -1720,13 +1729,15 @@ static const struct bcm2835_clk_desc clk
|
||||
@@ -1724,13 +1733,15 @@ static const struct bcm2835_clk_desc clk
|
||||
.div_reg = CM_GP1DIV,
|
||||
.int_bits = 12,
|
||||
.frac_bits = 12,
|
||||
|
@ -22,7 +22,7 @@ Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain
|
||||
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -1020,16 +1020,28 @@ static int bcm2835_clock_set_rate(struct
|
||||
@@ -1024,16 +1024,28 @@ static int bcm2835_clock_set_rate(struct
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -51,7 +51,7 @@ Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain
|
||||
/*
|
||||
* Select parent clock that results in the closest but lower rate
|
||||
*/
|
||||
@@ -1037,6 +1049,17 @@ static int bcm2835_clock_determine_rate(
|
||||
@@ -1041,6 +1053,17 @@ static int bcm2835_clock_determine_rate(
|
||||
parent = clk_hw_get_parent_by_index(hw, i);
|
||||
if (!parent)
|
||||
continue;
|
||||
|
@ -15,87 +15,17 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
|
||||
--- a/arch/mips/mm/cache.c
|
||||
+++ b/arch/mips/mm/cache.c
|
||||
@@ -14,6 +14,7 @@
|
||||
#include <linux/sched.h>
|
||||
#include <linux/syscalls.h>
|
||||
#include <linux/mm.h>
|
||||
+#include <linux/highmem.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/processor.h>
|
||||
@@ -78,18 +79,29 @@ SYSCALL_DEFINE3(cacheflush, unsigned lon
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void
|
||||
+flush_highmem_page(struct page *page)
|
||||
+{
|
||||
+ void *addr = kmap_atomic(page);
|
||||
+ flush_data_cache_page((unsigned long)addr);
|
||||
+ kunmap_atomic(addr);
|
||||
+}
|
||||
+
|
||||
void __flush_dcache_page(struct page *page)
|
||||
{
|
||||
struct address_space *mapping = page_mapping(page);
|
||||
unsigned long addr;
|
||||
|
||||
- if (PageHighMem(page))
|
||||
- return;
|
||||
if (mapping && !mapping_mapped(mapping)) {
|
||||
SetPageDcacheDirty(page);
|
||||
return;
|
||||
}
|
||||
|
||||
+ if (PageHighMem(page)) {
|
||||
+ flush_highmem_page(page);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
/*
|
||||
* We could delay the flush for the !page_mapping case too. But that
|
||||
* case is for exec env/arg pages and those are %99 certainly going to
|
||||
@@ -105,6 +117,11 @@ void __flush_anon_page(struct page *page
|
||||
@@ -111,6 +111,13 @@ void __flush_anon_page(struct page *page
|
||||
{
|
||||
unsigned long addr = (unsigned long) page_address(page);
|
||||
|
||||
+ if (PageHighMem(page)) {
|
||||
+ flush_highmem_page(page);
|
||||
+ addr = (unsigned long)kmap_atomic(page);
|
||||
+ flush_data_cache_page(addr);
|
||||
+ __kunmap_atomic((void *)addr);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
if (pages_do_alias(addr, vmaddr)) {
|
||||
if (page_mapped(page) && !Page_dcache_dirty(page)) {
|
||||
void *kaddr;
|
||||
@@ -123,8 +140,10 @@ void __flush_icache_page(struct vm_area_
|
||||
{
|
||||
unsigned long addr;
|
||||
|
||||
- if (PageHighMem(page))
|
||||
+ if (PageHighMem(page)) {
|
||||
+ flush_highmem_page(page);
|
||||
return;
|
||||
+ }
|
||||
|
||||
addr = (unsigned long) page_address(page);
|
||||
flush_data_cache_page(addr);
|
||||
@@ -142,12 +161,17 @@ void __update_cache(struct vm_area_struc
|
||||
if (unlikely(!pfn_valid(pfn)))
|
||||
return;
|
||||
page = pfn_to_page(pfn);
|
||||
- if (page_mapping(page) && Page_dcache_dirty(page)) {
|
||||
+ if (!Page_dcache_dirty(page) || !page_mapping(page))
|
||||
+ return;
|
||||
+
|
||||
+ if (PageHighMem(page)) {
|
||||
+ flush_highmem_page(page);
|
||||
+ } else {
|
||||
addr = (unsigned long) page_address(page);
|
||||
if (exec || pages_do_alias(addr, address & PAGE_MASK))
|
||||
flush_data_cache_page(addr);
|
||||
- ClearPageDcacheDirty(page);
|
||||
}
|
||||
+ ClearPageDcacheDirty(page);
|
||||
}
|
||||
|
||||
unsigned long _page_cachable_default;
|
||||
|
@ -4,7 +4,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
|
||||
--- a/arch/mips/vdso/Makefile
|
||||
+++ b/arch/mips/vdso/Makefile
|
||||
@@ -26,11 +26,11 @@ aflags-vdso := $(ccflags-vdso) \
|
||||
@@ -28,11 +28,11 @@ aflags-vdso := $(ccflags-vdso) \
|
||||
# the comments on that file.
|
||||
#
|
||||
ifndef CONFIG_CPU_MIPSR6
|
||||
|
@ -1,6 +1,6 @@
|
||||
--- a/arch/mips/vdso/Makefile
|
||||
+++ b/arch/mips/vdso/Makefile
|
||||
@@ -75,7 +75,7 @@ $(obj-vdso): KBUILD_AFLAGS := $(aflags-v
|
||||
@@ -77,7 +77,7 @@ $(obj-vdso): KBUILD_AFLAGS := $(aflags-v
|
||||
|
||||
$(obj)/vdso.lds: KBUILD_CPPFLAGS := $(native-abi)
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
$(call if_changed,vdsold)
|
||||
|
||||
$(obj)/vdso-image.c: $(obj)/vdso.so.dbg $(obj)/genvdso FORCE
|
||||
@@ -109,7 +109,7 @@ $(obj)/vdso-o32.lds: KBUILD_CPPFLAGS :=
|
||||
@@ -111,7 +111,7 @@ $(obj)/vdso-o32.lds: KBUILD_CPPFLAGS :=
|
||||
$(obj)/vdso-o32.lds: $(src)/vdso.lds.S FORCE
|
||||
$(call if_changed_dep,cpp_lds_S)
|
||||
|
||||
@ -18,7 +18,7 @@
|
||||
$(call if_changed,vdsold)
|
||||
|
||||
$(obj)/vdso-o32-image.c: VDSO_NAME := o32
|
||||
@@ -145,7 +145,7 @@ $(obj)/vdso-n32.lds: KBUILD_CPPFLAGS :=
|
||||
@@ -147,7 +147,7 @@ $(obj)/vdso-n32.lds: KBUILD_CPPFLAGS :=
|
||||
$(obj)/vdso-n32.lds: $(src)/vdso.lds.S FORCE
|
||||
$(call if_changed_dep,cpp_lds_S)
|
||||
|
||||
|
@ -1,58 +0,0 @@
|
||||
Some of the GPIO configs were wrong in the submitted DTS files,
|
||||
this patch fixes all affected boards.
|
||||
|
||||
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
||||
|
||||
Cc: <stable@vger.kernel.org> # v4.1 +
|
||||
---
|
||||
arch/arm/boot/dts/armada-385-linksys.dtsi | 6 +++---
|
||||
arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 4 ++--
|
||||
2 files changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
|
||||
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
|
||||
@@ -245,7 +245,7 @@
|
||||
button@2 {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -260,7 +260,7 @@
|
||||
};
|
||||
|
||||
sata {
|
||||
- gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
@@ -313,7 +313,7 @@
|
||||
|
||||
&pinctrl {
|
||||
keys_pin: keys-pin {
|
||||
- marvell,pins = "mpp24", "mpp47";
|
||||
+ marvell,pins = "mpp24", "mpp29";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
|
||||
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
|
||||
@@ -304,13 +304,13 @@
|
||||
button@1 {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
- gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
@ -18,7 +18,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
sparse_init();
|
||||
plat_swiotlb_setup();
|
||||
paging_init();
|
||||
@@ -806,6 +805,7 @@ void __init setup_arch(char **cmdline_p)
|
||||
@@ -809,6 +808,7 @@ void __init setup_arch(char **cmdline_p)
|
||||
prefill_possible_map();
|
||||
|
||||
cpu_cache_init();
|
||||
|
Loading…
Reference in New Issue
Block a user