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generic: ar8216: add port mirroring
Tested on Buffalo WZR-600DHP with ar8316 switch. Commands used to mirror both RX and TX traffic from LAN port 1 to LAN port 4: $ swconfig dev switch0 set enable_mirror_rx 1 $ swconfig dev switch0 set enable_mirror_tx 1 $ swconfig dev switch0 set mirror_monitor_port 4 $ swconfig dev switch0 set mirror_source_port 1 Signed-off-by: Colin Leitner <colin.leitner@googlemail.com> Tested-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 36713
This commit is contained in:
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90887b5fb3
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0998065a53
@ -120,6 +120,12 @@ struct ar8xxx_priv {
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u8 vlan_table[AR8X16_MAX_VLANS];
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u8 vlan_tagged;
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u16 pvid[AR8X16_MAX_PORTS];
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/* mirroring */
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bool mirror_rx;
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bool mirror_tx;
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int source_port;
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int monitor_port;
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};
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#define MIB_DESC(_s , _o, _n) \
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@ -1457,6 +1463,98 @@ ar8xxx_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
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return 0;
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}
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static void
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ar8327_set_mirror_regs(struct ar8xxx_priv *priv)
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{
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int port;
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/* reset all mirror registers */
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ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
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AR8327_FWD_CTRL0_MIRROR_PORT,
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(0xF << AR8327_FWD_CTRL0_MIRROR_PORT_S));
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for (port = 0; port < AR8327_NUM_PORTS; port++) {
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ar8xxx_rmw(priv, AR8327_REG_PORT_LOOKUP(port),
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AR8327_PORT_LOOKUP_ING_MIRROR_EN,
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0);
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ar8xxx_rmw(priv, AR8327_REG_PORT_HOL_CTRL1(port),
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AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
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0);
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}
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/* now enable mirroring if necessary */
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if (priv->source_port >= AR8327_NUM_PORTS ||
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priv->monitor_port >= AR8327_NUM_PORTS ||
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priv->source_port == priv->monitor_port) {
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return;
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}
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ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
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AR8327_FWD_CTRL0_MIRROR_PORT,
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(priv->monitor_port << AR8327_FWD_CTRL0_MIRROR_PORT_S));
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if (priv->mirror_rx)
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ar8xxx_rmw(priv, AR8327_REG_PORT_LOOKUP(priv->source_port),
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AR8327_PORT_LOOKUP_ING_MIRROR_EN,
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AR8327_PORT_LOOKUP_ING_MIRROR_EN);
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if (priv->mirror_tx)
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ar8xxx_rmw(priv, AR8327_REG_PORT_HOL_CTRL1(priv->source_port),
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AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
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AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN);
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}
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static void
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ar8216_set_mirror_regs(struct ar8xxx_priv *priv)
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{
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int port;
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/* reset all mirror registers */
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ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
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AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
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(0xF << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
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for (port = 0; port < AR8216_NUM_PORTS; port++) {
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ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
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AR8216_PORT_CTRL_MIRROR_RX,
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0);
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ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
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AR8216_PORT_CTRL_MIRROR_TX,
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0);
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}
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/* now enable mirroring if necessary */
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if (priv->source_port >= AR8216_NUM_PORTS ||
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priv->monitor_port >= AR8216_NUM_PORTS ||
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priv->source_port == priv->monitor_port) {
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return;
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}
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ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
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AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
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(priv->monitor_port << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
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if (priv->mirror_rx)
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ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(priv->source_port),
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AR8216_PORT_CTRL_MIRROR_RX,
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AR8216_PORT_CTRL_MIRROR_RX);
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if (priv->mirror_tx)
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ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(priv->source_port),
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AR8216_PORT_CTRL_MIRROR_TX,
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AR8216_PORT_CTRL_MIRROR_TX);
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}
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static void
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ar8xxx_set_mirror_regs(struct ar8xxx_priv *priv)
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{
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if (chip_is_ar8327(priv)) {
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ar8327_set_mirror_regs(priv);
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} else {
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ar8216_set_mirror_regs(priv);
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}
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}
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static int
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ar8xxx_sw_hw_apply(struct switch_dev *dev)
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{
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@ -1520,6 +1618,9 @@ ar8xxx_sw_hw_apply(struct switch_dev *dev)
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priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
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pvid);
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}
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ar8xxx_set_mirror_regs(priv);
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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@ -1541,7 +1642,13 @@ ar8xxx_sw_reset_switch(struct switch_dev *dev)
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for (i = 0; i < dev->ports; i++)
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priv->chip->init_port(priv, i);
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priv->mirror_rx = false;
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priv->mirror_tx = false;
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priv->source_port = 0;
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priv->monitor_port = 0;
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priv->chip->init_globals(priv);
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mutex_unlock(&priv->reg_mutex);
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return ar8xxx_sw_hw_apply(dev);
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@ -1575,6 +1682,106 @@ unlock:
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return ret;
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}
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static int
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ar8xxx_sw_set_mirror_rx_enable(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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mutex_lock(&priv->reg_mutex);
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priv->mirror_rx = !!val->value.i;
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ar8xxx_set_mirror_regs(priv);
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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static int
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ar8xxx_sw_get_mirror_rx_enable(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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val->value.i = priv->mirror_rx;
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return 0;
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}
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static int
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ar8xxx_sw_set_mirror_tx_enable(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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mutex_lock(&priv->reg_mutex);
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priv->mirror_tx = !!val->value.i;
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ar8xxx_set_mirror_regs(priv);
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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static int
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ar8xxx_sw_get_mirror_tx_enable(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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val->value.i = priv->mirror_tx;
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return 0;
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}
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static int
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ar8xxx_sw_set_mirror_monitor_port(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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mutex_lock(&priv->reg_mutex);
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priv->monitor_port = val->value.i;
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ar8xxx_set_mirror_regs(priv);
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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static int
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ar8xxx_sw_get_mirror_monitor_port(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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val->value.i = priv->monitor_port;
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return 0;
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}
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static int
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ar8xxx_sw_set_mirror_source_port(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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mutex_lock(&priv->reg_mutex);
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priv->source_port = val->value.i;
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ar8xxx_set_mirror_regs(priv);
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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static int
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ar8xxx_sw_get_mirror_source_port(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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val->value.i = priv->source_port;
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return 0;
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}
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static int
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ar8xxx_sw_set_port_reset_mib(struct switch_dev *dev,
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const struct switch_attr *attr,
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@ -1668,7 +1875,87 @@ static struct switch_attr ar8xxx_sw_attr_globals[] = {
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.description = "Reset all MIB counters",
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.set = ar8xxx_sw_set_reset_mibs,
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_mirror_rx",
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.description = "Enable mirroring of RX packets",
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.set = ar8xxx_sw_set_mirror_rx_enable,
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.get = ar8xxx_sw_get_mirror_rx_enable,
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.max = 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_mirror_tx",
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.description = "Enable mirroring of TX packets",
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.set = ar8xxx_sw_set_mirror_tx_enable,
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.get = ar8xxx_sw_get_mirror_tx_enable,
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.max = 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "mirror_monitor_port",
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.description = "Mirror monitor port",
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.set = ar8xxx_sw_set_mirror_monitor_port,
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.get = ar8xxx_sw_get_mirror_monitor_port,
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.max = AR8216_NUM_PORTS - 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "mirror_source_port",
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.description = "Mirror source port",
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.set = ar8xxx_sw_set_mirror_source_port,
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.get = ar8xxx_sw_get_mirror_source_port,
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.max = AR8216_NUM_PORTS - 1
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},
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};
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static struct switch_attr ar8327_sw_attr_globals[] = {
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_vlan",
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.description = "Enable VLAN mode",
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.set = ar8xxx_sw_set_vlan,
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.get = ar8xxx_sw_get_vlan,
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.max = 1
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},
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{
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.type = SWITCH_TYPE_NOVAL,
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.name = "reset_mibs",
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.description = "Reset all MIB counters",
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.set = ar8xxx_sw_set_reset_mibs,
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_mirror_rx",
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.description = "Enable mirroring of RX packets",
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.set = ar8xxx_sw_set_mirror_rx_enable,
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.get = ar8xxx_sw_get_mirror_rx_enable,
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.max = 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_mirror_tx",
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.description = "Enable mirroring of TX packets",
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.set = ar8xxx_sw_set_mirror_tx_enable,
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.get = ar8xxx_sw_get_mirror_tx_enable,
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.max = 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "mirror_monitor_port",
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.description = "Mirror monitor port",
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.set = ar8xxx_sw_set_mirror_monitor_port,
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.get = ar8xxx_sw_get_mirror_monitor_port,
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.max = AR8327_NUM_PORTS - 1
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},
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{
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.type = SWITCH_TYPE_INT,
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.name = "mirror_source_port",
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.description = "Mirror source port",
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.set = ar8xxx_sw_set_mirror_source_port,
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.get = ar8xxx_sw_get_mirror_source_port,
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.max = AR8327_NUM_PORTS - 1
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},
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};
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static struct switch_attr ar8xxx_sw_attr_port[] = {
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@ -1720,6 +2007,28 @@ static const struct switch_dev_ops ar8xxx_sw_ops = {
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.get_port_link = ar8xxx_sw_get_port_link,
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};
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static const struct switch_dev_ops ar8327_sw_ops = {
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.attr_global = {
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.attr = ar8327_sw_attr_globals,
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.n_attr = ARRAY_SIZE(ar8327_sw_attr_globals),
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},
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.attr_port = {
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.attr = ar8xxx_sw_attr_port,
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.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_port),
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},
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.attr_vlan = {
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.attr = ar8xxx_sw_attr_vlan,
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.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_vlan),
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},
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.get_port_pvid = ar8xxx_sw_get_pvid,
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.set_port_pvid = ar8xxx_sw_set_pvid,
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.get_vlan_ports = ar8xxx_sw_get_ports,
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.set_vlan_ports = ar8xxx_sw_set_ports,
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.apply_config = ar8xxx_sw_hw_apply,
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.reset_switch = ar8xxx_sw_reset_switch,
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.get_port_link = ar8xxx_sw_get_port_link,
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};
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static int
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ar8xxx_id_chip(struct ar8xxx_priv *priv)
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{
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@ -1900,6 +2209,7 @@ ar8xxx_probe_switch(struct ar8xxx_priv *priv)
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swdev->name = "Atheros AR8327";
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swdev->vlans = AR8X16_MAX_VLANS;
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swdev->ports = AR8327_NUM_PORTS;
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swdev->ops = &ar8327_sw_ops;
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} else {
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swdev->name = "Atheros AR8216";
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swdev->vlans = AR8216_NUM_VLANS;
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@ -105,6 +105,10 @@
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#define AR8216_MIB_FUNC_CAPTURE 0x3
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#define AR8236_MIB_EN BIT(30)
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#define AR8216_REG_GLOBAL_CPUPORT 0x0078
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#define AR8216_GLOBAL_CPUPORT_MIRROR_PORT BITS(4, 4)
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#define AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S 4
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#define AR8216_PORT_OFFSET(_i) (0x0100 * (_i + 1))
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#define AR8216_REG_PORT_STATUS(_i) (AR8216_PORT_OFFSET(_i) + 0x0000)
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#define AR8216_PORT_STATUS_SPEED BITS(0,2)
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@ -433,9 +437,13 @@
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#define AR8327_PORT_LOOKUP_STATE BITS(16, 3)
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#define AR8327_PORT_LOOKUP_STATE_S 16
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#define AR8327_PORT_LOOKUP_LEARN BIT(20)
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#define AR8327_PORT_LOOKUP_ING_MIRROR_EN BIT(25)
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#define AR8327_REG_PORT_PRIO(_i) (0x664 + (_i) * 0xc)
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#define AR8327_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8)
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#define AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)
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#define AR8327_REG_PORT_STATS_BASE(_i) (0x1000 + (_i) * 0x100)
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/* port speed */
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