From 0217a9be0d84438251401bd4a8d21d3e857c5e91 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= Date: Fri, 5 Jun 2020 15:56:15 +0200 Subject: [PATCH] generic: platform/mikrotik: graceful fallback for cpufreq_index MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The current code would return an error on ath79 when the SoC isn't known to the driver. Return the raw hex value instead, as happens with non supported targets. Also return the correctly incremented value from sc_tag_cpufreq_ath79_arraysize() Signed-off-by: Thibaut VARÈNE --- .../drivers/platform/mikrotik/rb_softconfig.c | 21 +++++++++++-------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c b/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c index be526e9a6d1..5cfb08f8acc 100644 --- a/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c +++ b/target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c @@ -168,8 +168,9 @@ static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf, u32 data; // cpu-endian int i; + // fallback to raw hex output if we can't handle the input if (tvselmts < 0) - return tvselmts; + return routerboot_tag_show_u32s(pld, pld_len, buf); if (sizeof(data) != pld_len) return -EINVAL; @@ -397,30 +398,32 @@ static struct sc_u32tvs const sc_cpufreq_indexes_ath79[] = { RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_F, "f"), }; -static int sc_tag_cpufreq_ath79_idxmax(void) +static int sc_tag_cpufreq_ath79_arraysize(void) { - int idx_max = -EOPNOTSUPP; + int idx_max; if (soc_is_ar9344()) - idx_max = RB_CPU_FREQ_IDX_ATH79_AR9334_MAX; + idx_max = RB_CPU_FREQ_IDX_ATH79_AR9334_MAX+1; else if (soc_is_qca953x()) - idx_max = RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX; + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX+1; else if (soc_is_qca9556()) - idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX; + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX+1; else if (soc_is_qca9558()) - idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX; + idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX+1; + else + idx_max = -EOPNOTSUPP; return idx_max; } static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char * buf) { - return sc_tag_show_u32tvs(pld, pld_len, buf, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1); + return sc_tag_show_u32tvs(pld, pld_len, buf, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_arraysize()); } static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count) { - return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1); + return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_arraysize()); } #else /* By default we only show the raw value to help with reverse-engineering */