openwrt/target/linux/ramips/dts/mt7628an_asus_rt-ac1200.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	aliases {
		led-boot = &led_wps;
		led-failsafe = &led_wps;
		led-running = &led_wps;
		led-upgrade = &led_wps;
		label-mac-device = &ethernet;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_wps: wps {
			label = "blue:wps";
			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "blue:wlan2g";
			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <58000000>;
		m25p,fast-read;

		partitions: partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;

				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				macaddr_factory_4: macaddr@4 {
					reg = <0x4 0x6>;
				};
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xfb0000>;
			};
		};
	};
};

&gpio {
	enable-leds {
		gpio-hog;
		line-name = "enable-leds";
		output-low;
		gpios = <4 GPIO_ACTIVE_HIGH>;
	};
};

&ethernet {
	nvmem-cells = <&macaddr_factory_4>;
	nvmem-cell-names = "mac-address";
};

&esw {
	mediatek,portmap = <0x3e>;
	mediatek,led_source = <4>;
};

&wmac {
	status = "okay";

	mediatek,mtd-eeprom = <&factory 0x0>;
};

&pcie {
	status = "okay";
};

&pcie0 {
	mt76@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;

		led {
			led-sources = <2>;
			led-active-low;
		};
	};
};