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48 lines
1.7 KiB
Diff
48 lines
1.7 KiB
Diff
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From 18363f691e931abf0e9bdc9b5169fb15aa10224d Mon Sep 17 00:00:00 2001
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From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Date: Sun, 15 May 2022 03:24:22 +0530
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Subject: [PATCH] arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names'
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for sdhci nodes
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Since the Qualcomm sdhci-msm device-tree binding has been converted
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to yaml format, 'make dtbs_check' reports a number of issues with
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ordering of 'clocks' & 'clock-names' for sdhci nodes:
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arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
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clock-names:0: 'iface' was expected
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arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
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clock-names:1: 'core' was expected
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arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
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clock-names:2: 'xo' was expected
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Fix the same by updating the offending 'dts' files.
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Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
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Cc: Rob Herring <robh@kernel.org>
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Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -384,10 +384,10 @@
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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- clocks = <&xo>,
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- <&gcc GCC_SDCC1_AHB_CLK>,
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- <&gcc GCC_SDCC1_APPS_CLK>;
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- clock-names = "xo", "iface", "core";
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+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
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+ <&gcc GCC_SDCC1_APPS_CLK>,
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+ <&xo>;
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+ clock-names = "iface", "core", "xo";
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max-frequency = <384000000>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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