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https://github.com/openwrt/openwrt.git
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85 lines
2.6 KiB
Diff
85 lines
2.6 KiB
Diff
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From 871d1be8c3ce46b8ef395b56cd0e37cede10e76a Mon Sep 17 00:00:00 2001
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From: Ralf Baechle <ralf@linux-mips.org>
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Date: Tue, 17 Sep 2013 12:44:31 +0200
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Subject: [PATCH 203/215] MIPS: Fix accessing to per-cpu data when flushing
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the cache
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This fixes the following issue
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BUG: using smp_processor_id() in preemptible [00000000] code: kjournald/1761
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caller is blast_dcache32+0x30/0x254
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Call Trace:
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[<8047f02c>] dump_stack+0x8/0x34
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[<802e7e40>] debug_smp_processor_id+0xe0/0xf0
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[<80114d94>] blast_dcache32+0x30/0x254
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[<80118484>] r4k_dma_cache_wback_inv+0x200/0x288
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[<80110ff0>] mips_dma_map_sg+0x108/0x180
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[<80355098>] ide_dma_prepare+0xf0/0x1b8
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[<8034eaa4>] do_rw_taskfile+0x1e8/0x33c
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[<8035951c>] ide_do_rw_disk+0x298/0x3e4
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[<8034a3c4>] do_ide_request+0x2e0/0x704
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[<802bb0dc>] __blk_run_queue+0x44/0x64
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[<802be000>] queue_unplugged.isra.36+0x1c/0x54
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[<802beb94>] blk_flush_plug_list+0x18c/0x24c
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[<802bec6c>] blk_finish_plug+0x18/0x48
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[<8026554c>] journal_commit_transaction+0x3b8/0x151c
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[<80269648>] kjournald+0xec/0x238
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[<8014ac00>] kthread+0xb8/0xc0
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[<8010268c>] ret_from_kernel_thread+0x14/0x1c
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Caches in most systems are identical - but not always, so we can't avoid
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the use of smp_call_function() by just looking at the boot CPU's data,
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have to fiddle with preemption instead.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Cc: Markos Chandras <markos.chandras@imgtec.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/5835
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(cherry picked from commit ff522058bd717506b2fa066fa564657f2b86477e)
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---
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arch/mips/mm/c-r4k.c | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/arch/mips/mm/c-r4k.c
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+++ b/arch/mips/mm/c-r4k.c
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@@ -12,6 +12,7 @@
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#include <linux/highmem.h>
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#include <linux/kernel.h>
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#include <linux/linkage.h>
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+#include <linux/preempt.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/mm.h>
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@@ -601,6 +602,7 @@ static void r4k_dma_cache_wback_inv(unsi
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/* Catch bad driver code */
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BUG_ON(size == 0);
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+ preempt_disable();
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if (cpu_has_inclusive_pcaches) {
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if (size >= scache_size)
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r4k_blast_scache();
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@@ -621,6 +623,7 @@ static void r4k_dma_cache_wback_inv(unsi
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R4600_HIT_CACHEOP_WAR_IMPL;
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blast_dcache_range(addr, addr + size);
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}
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+ preempt_enable();
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bc_wback_inv(addr, size);
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__sync();
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@@ -631,6 +634,7 @@ static void r4k_dma_cache_inv(unsigned l
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/* Catch bad driver code */
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BUG_ON(size == 0);
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+ preempt_disable();
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if (cpu_has_inclusive_pcaches) {
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if (size >= scache_size)
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r4k_blast_scache();
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@@ -655,6 +659,7 @@ static void r4k_dma_cache_inv(unsigned l
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R4600_HIT_CACHEOP_WAR_IMPL;
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blast_inv_dcache_range(addr, addr + size);
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}
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+ preempt_enable();
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bc_inv(addr, size);
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__sync();
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