2024-04-10 14:14:32 +00:00
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From c1b2294a9b4b9b6c0cbe58666cb86e0a9cb0abfd Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Jan 2024 08:35:56 +0300
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Subject: [PATCH 09/30] net: dsa: mt7530: improve code path for setting up port
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5
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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There're two code paths for setting up port 5:
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mt7530_setup()
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-> mt7530_setup_port5()
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mt753x_phylink_mac_config()
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-> mt753x_mac_config()
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-> mt7530_mac_config()
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-> mt7530_setup_port5()
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Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5
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is used as a CPU, DSA, or user port, mt7530_setup_port5() from
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mt753x_phylink_mac_config() won't run. That is because priv->p5_interface
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set on mt7530_setup_port5() will match state->interface on
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mt753x_phylink_mac_config() which will stop running mt7530_setup_port5()
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again.
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Therefore, mt7530_setup_port5() will never run from
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mt753x_phylink_mac_config().
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Address this by not running mt7530_setup_port5() from mt7530_setup() if
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port 5 is used as a CPU, DSA, or user port. This driver isn't in the
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dsa_switches_apply_workarounds[] array so phylink will always be present.
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To keep the cases where port 5 isn't controlled by phylink working as
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before, preserve the mt7530_setup_port5() call from mt7530_setup().
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Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when
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"priv" is allocated.
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Move setting the interface to a more specific location. It's supposed to be
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overwritten if PHY muxing is detected.
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Improve the comment which explains the process.
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-5-042401f2b279@arinc9.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mt7530.c | 17 ++++++++---------
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1 file changed, 8 insertions(+), 9 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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2024-04-28 06:25:30 +00:00
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@@ -2529,16 +2529,15 @@ mt7530_setup(struct dsa_switch *ds)
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2024-04-10 14:14:32 +00:00
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return ret;
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/* Setup port 5 */
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- priv->p5_intf_sel = P5_DISABLED;
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- interface = PHY_INTERFACE_MODE_NA;
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-
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if (!dsa_is_unused_port(ds, 5)) {
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priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
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- ret = of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface);
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- if (ret && ret != -ENODEV)
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- return ret;
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} else {
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- /* Scan the ethernet nodes. look for GMAC1, lookup used phy */
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+ /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY.
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+ * Set priv->p5_intf_sel to the appropriate value if PHY muxing
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+ * is detected.
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+ */
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+ interface = PHY_INTERFACE_MODE_NA;
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+
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for_each_child_of_node(dn, mac_np) {
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if (!of_device_is_compatible(mac_np,
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"mediatek,eth-mac"))
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2024-04-28 06:25:30 +00:00
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@@ -2569,6 +2568,8 @@ mt7530_setup(struct dsa_switch *ds)
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2024-04-10 14:14:32 +00:00
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of_node_put(phy_node);
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break;
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}
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+
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+ mt7530_setup_port5(ds, interface);
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}
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#ifdef CONFIG_GPIOLIB
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2024-04-28 06:25:30 +00:00
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@@ -2579,8 +2580,6 @@ mt7530_setup(struct dsa_switch *ds)
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2024-04-10 14:14:32 +00:00
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}
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#endif /* CONFIG_GPIOLIB */
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- mt7530_setup_port5(ds, interface);
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-
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/* Flush the FDB table */
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ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
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if (ret < 0)
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