2022-03-30 14:05:55 +00:00
|
|
|
From 1a46061a2a4130a08841941ce6dcaa32be2ce312 Mon Sep 17 00:00:00 2001
|
2021-11-23 09:14:22 +00:00
|
|
|
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
|
2022-03-30 14:05:55 +00:00
|
|
|
Date: Tue, 23 Nov 2021 10:03:33 +0100
|
2021-11-23 09:14:22 +00:00
|
|
|
Subject: [PATCH] ARM: dts: BCM5301X: use non-deprecated USB 2.0 PHY binding
|
|
|
|
MIME-Version: 1.0
|
|
|
|
Content-Type: text/plain; charset=UTF-8
|
|
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
|
|
|
|
The new binding covers a single reg and uses syscon to reference shared
|
|
|
|
register.
|
|
|
|
|
|
|
|
References: 55b9b741712d ("dt-bindings: phy: brcm,ns-usb2-phy: bind just a PHY block")
|
|
|
|
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
|
2022-03-30 14:05:55 +00:00
|
|
|
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
2021-11-23 09:14:22 +00:00
|
|
|
---
|
|
|
|
arch/arm/boot/dts/bcm5301x.dtsi | 20 ++++++++++----------
|
|
|
|
1 file changed, 10 insertions(+), 10 deletions(-)
|
|
|
|
|
|
|
|
--- a/arch/arm/boot/dts/bcm5301x.dtsi
|
|
|
|
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
|
|
|
|
@@ -148,15 +148,6 @@
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
- usb2_phy: usb2-phy@1800c000 {
|
|
|
|
- compatible = "brcm,ns-usb2-phy";
|
|
|
|
- reg = <0x1800c000 0x1000>;
|
|
|
|
- reg-names = "dmu";
|
|
|
|
- #phy-cells = <0>;
|
|
|
|
- clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
|
|
|
|
- clock-names = "phy-ref-clk";
|
|
|
|
- };
|
|
|
|
-
|
|
|
|
axi@18000000 {
|
|
|
|
compatible = "brcm,bus-axi";
|
|
|
|
reg = <0x18000000 0x1000>;
|
|
|
|
@@ -450,7 +441,16 @@
|
|
|
|
"sata1", "sata2";
|
|
|
|
};
|
|
|
|
|
|
|
|
- syscon@180 {
|
|
|
|
+ usb2_phy: phy@164 {
|
|
|
|
+ compatible = "brcm,ns-usb2-phy";
|
|
|
|
+ reg = <0x164 0x4>;
|
|
|
|
+ brcm,syscon-clkset = <&cru_clkset>;
|
|
|
|
+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
|
|
|
|
+ clock-names = "phy-ref-clk";
|
|
|
|
+ #phy-cells = <0>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ cru_clkset: syscon@180 {
|
|
|
|
compatible = "brcm,cru-clkset", "syscon";
|
|
|
|
reg = <0x180 0x4>;
|
|
|
|
};
|