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76 lines
2.9 KiB
Diff
76 lines
2.9 KiB
Diff
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From 7cb1dad7a7dfe4cfe55ebe86930dd6aef0de66b4 Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Fri, 13 Nov 2020 15:24:29 +0200
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Subject: [PATCH 131/247] pinctrl: at91-pio4: add support for fewer lines on
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last PIO bank
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Some products, like sama7g5, do not have a full last bank of PIO lines.
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In this case for example, sama7g5 only has 8 lines for the PE bank.
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PA0-31, PB0-31, PC0-31, PD0-31, PE0-7, in total 136 lines.
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To cope with this situation, added a data attribute that is product dependent,
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to specify the number of lines of the last bank.
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In case this number is different from the macro ATMEL_PIO_NPINS_PER_BANK,
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adjust the total number of lines accordingly.
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This will avoid advertising 160 lines instead of the actual 136, as this
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product supports, and to avoid reading/writing to invalid register addresses.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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Link: https://lore.kernel.org/r/20201113132429.420940-1-eugen.hristev@microchip.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/pinctrl-at91-pio4.c | 18 ++++++++++++++++--
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1 file changed, 16 insertions(+), 2 deletions(-)
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diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
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index 578b387100d9..d267367d94b9 100644
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--- a/drivers/pinctrl/pinctrl-at91-pio4.c
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+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
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@@ -71,8 +71,15 @@
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/* Custom pinconf parameters */
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#define ATMEL_PIN_CONFIG_DRIVE_STRENGTH (PIN_CONFIG_END + 1)
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+/**
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+ * struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct
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+ * @nbanks: number of PIO banks
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+ * @last_bank_count: number of lines in the last bank (can be less than
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+ * the rest of the banks).
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+ */
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struct atmel_pioctrl_data {
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unsigned nbanks;
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+ unsigned last_bank_count;
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};
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struct atmel_group {
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@@ -980,11 +987,13 @@ static const struct dev_pm_ops atmel_pctrl_pm_ops = {
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* We can have up to 16 banks.
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*/
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static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {
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- .nbanks = 4,
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+ .nbanks = 4,
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+ .last_bank_count = ATMEL_PIO_NPINS_PER_BANK,
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};
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static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
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- .nbanks = 5,
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+ .nbanks = 5,
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+ .last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */
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};
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static const struct of_device_id atmel_pctrl_of_match[] = {
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@@ -1025,6 +1034,11 @@ static int atmel_pinctrl_probe(struct platform_device *pdev)
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atmel_pioctrl_data = match->data;
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atmel_pioctrl->nbanks = atmel_pioctrl_data->nbanks;
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atmel_pioctrl->npins = atmel_pioctrl->nbanks * ATMEL_PIO_NPINS_PER_BANK;
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+ /* if last bank has limited number of pins, adjust accordingly */
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+ if (atmel_pioctrl_data->last_bank_count != ATMEL_PIO_NPINS_PER_BANK) {
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+ atmel_pioctrl->npins -= ATMEL_PIO_NPINS_PER_BANK;
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+ atmel_pioctrl->npins += atmel_pioctrl_data->last_bank_count;
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+ }
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atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(atmel_pioctrl->reg_base))
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--
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2.32.0
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