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21 lines
686 B
Diff
21 lines
686 B
Diff
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Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
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MIPS16 functions have a static assembler prologue which clobbers
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registers v0 and v1. Add these register clobbers to function call
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instructions.
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--- a/gcc/config/mips/mips.cc
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+++ b/gcc/config/mips/mips.cc
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@@ -3134,6 +3134,12 @@ mips_emit_call_insn (rtx pattern, rtx or
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emit_insn (gen_update_got_version ());
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}
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+ if (TARGET_MIPS16 && TARGET_USE_GOT)
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+ {
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+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
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+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
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+ }
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+
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if (TARGET_MIPS16
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&& TARGET_EXPLICIT_RELOCS
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&& TARGET_CALL_CLOBBERED_GP)
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