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346 lines
8.2 KiB
Diff
346 lines
8.2 KiB
Diff
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From 76e509fd83156e96156e089eccfd49e2ebda5ec5 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Sat, 14 Oct 2023 14:57:49 +0100
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Subject: [PATCH 0674/1085] vc_mem: Add the DMA memcpy support from bcm2708_fb
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bcm2708_fb is disabled by the vc4-kms-v3d overlay, which means that the
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DMA memcpy support it provides is not available to allow vclog to read
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the VC logs from the top 16MB on Pi 2 and Pi 3. Add the code to the
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vc_mem driver, which will still be enabled.
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It ought to be possible to do a proper DMA_MEM_TO_MEM copy via the
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generic DMA customer API, but that can be a later step.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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drivers/char/broadcom/vc_mem.c | 259 +++++++++++++++++++++++++++++++++
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1 file changed, 259 insertions(+)
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--- a/drivers/char/broadcom/vc_mem.c
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+++ b/drivers/char/broadcom/vc_mem.c
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@@ -23,9 +23,21 @@
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#include <linux/uaccess.h>
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#include <linux/dma-mapping.h>
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#include <linux/broadcom/vc_mem.h>
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+#include <linux/compat.h>
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+#include <linux/platform_data/dma-bcm2708.h>
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+#include <soc/bcm2835/raspberrypi-firmware.h>
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#define DRIVER_NAME "vc-mem"
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+/* N.B. These use a different magic value for compatibility with bmc7208_fb */
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+#define VC_MEM_IOC_DMACOPY _IOW('z', 0x22, struct vc_mem_dmacopy)
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+#define VC_MEM_IOC_DMACOPY32 _IOW('z', 0x22, struct vc_mem_dmacopy32)
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+
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+/* address with no aliases */
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+#define INTALIAS_NORMAL(x) ((x) & ~0xc0000000)
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+/* cache coherent but non-allocating in L1 and L2 */
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+#define INTALIAS_L1L2_NONALLOCATING(x) (((x) & ~0xc0000000) | 0x80000000)
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+
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/* Device (/dev) related variables */
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static dev_t vc_mem_devnum;
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static struct class *vc_mem_class;
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@@ -36,6 +48,20 @@ static int vc_mem_inited;
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static struct dentry *vc_mem_debugfs_entry;
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#endif
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+struct vc_mem_dmacopy {
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+ void *dst;
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+ __u32 src;
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+ __u32 length;
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+};
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+
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+#ifdef CONFIG_COMPAT
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+struct vc_mem_dmacopy32 {
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+ compat_uptr_t dst;
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+ __u32 src;
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+ __u32 length;
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+};
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+#endif
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+
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/*
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* Videocore memory addresses and size
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*
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@@ -62,6 +88,20 @@ static uint phys_addr;
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static uint mem_size;
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static uint mem_base;
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+struct vc_mem_dma {
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+ struct device *dev;
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+ int dma_chan;
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+ int dma_irq;
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+ void __iomem *dma_chan_base;
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+ wait_queue_head_t dma_waitq;
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+ void *cb_base; /* DMA control blocks */
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+ dma_addr_t cb_handle;
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+};
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+
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+struct { u32 base, length; } gpu_mem;
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+static struct mutex dma_mutex;
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+static struct vc_mem_dma vc_mem_dma;
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+
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static int
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vc_mem_open(struct inode *inode, struct file *file)
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{
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@@ -99,6 +139,189 @@ vc_mem_get_current_size(void)
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}
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EXPORT_SYMBOL_GPL(vc_mem_get_current_size);
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+static int
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+vc_mem_dma_init(void)
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+{
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+ struct vc_mem_dma *vcdma = &vc_mem_dma;
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+ struct platform_device *pdev;
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+ struct device_node *fwnode;
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+ struct rpi_firmware *fw;
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+ struct device *dev;
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+ u32 revision;
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+ int rc;
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+
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+ if (vcdma->dev)
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+ return 0;
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+
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+ fwnode = of_find_node_by_path("/system");
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+ rc = of_property_read_u32(fwnode, "linux,revision", &revision);
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+ revision = (revision >> 12) & 0xf;
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+ if (revision != 1 && revision != 2) {
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+ /* Only BCM2709 and BCM2710 may have logs where the ARMs
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+ * can't see them.
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+ */
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+ return -ENXIO;
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+ }
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+
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+ fwnode = rpi_firmware_find_node();
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+ if (!fwnode)
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+ return -ENXIO;
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+
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+ pdev = of_find_device_by_node(fwnode);
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+ dev = &pdev->dev;
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+
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+ rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
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+ if (rc)
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+ return rc;
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+
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+ fw = rpi_firmware_get(fwnode);
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+ if (!fw)
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+ return -ENXIO;
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+ rc = rpi_firmware_property(fw, RPI_FIRMWARE_GET_VC_MEMORY,
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+ &gpu_mem, sizeof(gpu_mem));
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+ if (rc)
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+ return rc;
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+
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+ gpu_mem.base = INTALIAS_NORMAL(gpu_mem.base);
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+
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+ if (!gpu_mem.base || !gpu_mem.length) {
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+ dev_err(dev, "%s: unable to determine gpu memory (%x,%x)\n",
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+ __func__, gpu_mem.base, gpu_mem.length);
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+ return -EFAULT;
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+ }
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+
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+ vcdma->cb_base = dma_alloc_wc(dev, SZ_4K, &vcdma->cb_handle, GFP_KERNEL);
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+ if (!vcdma->cb_base) {
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+ dev_err(dev, "failed to allocate DMA CBs\n");
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+ return -ENOMEM;
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+ }
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+
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+ rc = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK,
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+ &vcdma->dma_chan_base,
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+ &vcdma->dma_irq);
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+ if (rc < 0) {
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+ dev_err(dev, "failed to allocate a DMA channel\n");
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+ goto free_cb;
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+ }
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+
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+ vcdma->dma_chan = rc;
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+
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+ init_waitqueue_head(&vcdma->dma_waitq);
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+
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+ vcdma->dev = dev;
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+
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+ return 0;
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+
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+free_cb:
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+ dma_free_wc(dev, SZ_4K, vcdma->cb_base, vcdma->cb_handle);
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+
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+ return rc;
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+}
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+
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+static void
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+vc_mem_dma_uninit(void)
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+{
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+ struct vc_mem_dma *vcdma = &vc_mem_dma;
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+
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+ if (vcdma->dev) {
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+ bcm_dma_chan_free(vcdma->dma_chan);
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+ dma_free_wc(vcdma->dev, SZ_4K, vcdma->cb_base, vcdma->cb_handle);
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+ vcdma->dev = NULL;
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+ }
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+}
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+
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+static int dma_memcpy(struct vc_mem_dma *vcdma, dma_addr_t dst, dma_addr_t src,
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+ int size)
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+{
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+ struct bcm2708_dma_cb *cb = vcdma->cb_base;
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+ int burst_size = (vcdma->dma_chan == 0) ? 8 : 2;
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+
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+ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
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+ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
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+ BCM2708_DMA_D_INC;
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+ cb->dst = dst;
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+ cb->src = src;
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+ cb->length = size;
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+ cb->stride = 0;
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+ cb->pad[0] = 0;
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+ cb->pad[1] = 0;
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+ cb->next = 0;
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+
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+ bcm_dma_start(vcdma->dma_chan_base, vcdma->cb_handle);
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+ bcm_dma_wait_idle(vcdma->dma_chan_base);
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+
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+ return 0;
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+}
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+
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+static long vc_mem_copy(struct vc_mem_dmacopy *ioparam)
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+{
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+ struct vc_mem_dma *vcdma = &vc_mem_dma;
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+ size_t size = PAGE_SIZE;
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+ const u32 dma_xfer_chunk = 256;
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+ u32 *buf = NULL;
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+ dma_addr_t bus_addr;
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+ long rc = 0;
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+ size_t offset;
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+
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+ /* restrict this to root user */
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+ if (!uid_eq(current_euid(), GLOBAL_ROOT_UID))
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+ return -EFAULT;
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+
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+ if (mutex_lock_interruptible(&dma_mutex))
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+ return -EINTR;
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+
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+ rc = vc_mem_dma_init();
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+ if (rc)
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+ goto out;
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+
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+ vcdma = &vc_mem_dma;
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+
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+ if (INTALIAS_NORMAL(ioparam->src) < gpu_mem.base ||
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+ INTALIAS_NORMAL(ioparam->src) >= gpu_mem.base + gpu_mem.length) {
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+ pr_err("%s: invalid memory access %x (%x-%x)", __func__,
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+ INTALIAS_NORMAL(ioparam->src), gpu_mem.base,
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+ gpu_mem.base + gpu_mem.length);
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+ rc = -EFAULT;
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+ goto out;
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+ }
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+
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+ buf = dma_alloc_coherent(vcdma->dev, PAGE_ALIGN(size), &bus_addr,
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+ GFP_ATOMIC);
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+ if (!buf) {
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+ rc = -ENOMEM;
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+ goto out;
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+ }
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+
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+ for (offset = 0; offset < ioparam->length; offset += size) {
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+ size_t remaining = ioparam->length - offset;
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+ size_t s = min(size, remaining);
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+ u8 *p = (u8 *)((uintptr_t)ioparam->src + offset);
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+ u8 *q = (u8 *)ioparam->dst + offset;
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+
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+ rc = dma_memcpy(vcdma, bus_addr,
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+ INTALIAS_L1L2_NONALLOCATING((u32)(uintptr_t)p),
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+ (s + dma_xfer_chunk - 1) & ~(dma_xfer_chunk - 1));
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+ if (rc) {
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+ dev_err(vcdma->dev, "dma_memcpy failed\n");
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+ break;
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+ }
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+ if (copy_to_user(q, buf, s) != 0) {
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+ pr_err("%s: copy_to_user failed\n", __func__);
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+ rc = -EFAULT;
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+ break;
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+ }
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+ }
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+
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+out:
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+ if (buf)
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+ dma_free_coherent(vcdma->dev, PAGE_ALIGN(size), buf,
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+ bus_addr);
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+
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+ mutex_unlock(&dma_mutex);
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+
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+ return rc;
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+}
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+
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static long
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vc_mem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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@@ -163,6 +386,21 @@ vc_mem_ioctl(struct file *file, unsigned
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}
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break;
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}
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+ case VC_MEM_IOC_DMACOPY:
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+ {
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+ struct vc_mem_dmacopy ioparam;
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+ /* Get the parameter data.
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+ */
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+ if (copy_from_user
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+ (&ioparam, (void *)arg, sizeof(ioparam))) {
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+ pr_err("%s: copy_from_user failed\n", __func__);
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+ rc = -EFAULT;
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+ break;
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+ }
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+
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+ rc = vc_mem_copy(&ioparam);
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+ break;
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+ }
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default:
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{
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return -ENOTTY;
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@@ -193,6 +431,24 @@ vc_mem_compat_ioctl(struct file *file, u
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break;
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+ case VC_MEM_IOC_DMACOPY32:
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+ {
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+ struct vc_mem_dmacopy32 param32;
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+ struct vc_mem_dmacopy param;
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+ /* Get the parameter data.
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+ */
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+ if (copy_from_user(¶m32, (void *)arg, sizeof(param32))) {
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+ pr_err("%s: copy_from_user failed\n", __func__);
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+ rc = -EFAULT;
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+ break;
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+ }
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+ param.dst = compat_ptr(param32.dst);
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+ param.src = param32.src;
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+ param.length = param32.length;
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+ rc = vc_mem_copy(¶m);
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+ break;
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+ }
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+
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default:
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rc = vc_mem_ioctl(file, cmd, arg);
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break;
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@@ -330,6 +586,7 @@ vc_mem_init(void)
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vc_mem_debugfs_init(dev);
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#endif
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+ mutex_init(&dma_mutex);
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vc_mem_inited = 1;
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return 0;
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@@ -352,6 +609,7 @@ vc_mem_exit(void)
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{
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pr_debug("%s: called\n", __func__);
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+ vc_mem_dma_uninit();
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if (vc_mem_inited) {
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#ifdef CONFIG_DEBUG_FS
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vc_mem_debugfs_deinit();
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@@ -360,6 +618,7 @@ vc_mem_exit(void)
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class_destroy(vc_mem_class);
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cdev_del(&vc_mem_cdev);
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unregister_chrdev_region(vc_mem_devnum, 1);
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+ vc_mem_inited = 0;
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}
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}
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