mirror of
https://github.com/openwrt/openwrt.git
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755 lines
16 KiB
Diff
755 lines
16 KiB
Diff
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From c6629b9a6738a64507478527da6c7b83c10a6d2c Mon Sep 17 00:00:00 2001
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From: Vasily Khoruzhick <anarsoul@gmail.com>
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Date: Tue, 7 Mar 2023 22:32:40 -0800
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Subject: [PATCH] arm64: dts: rockchip: Add FriendlyElec Nanopi R5S
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FriendlyElec Nanopi R5S is an open-sourced mini IoT gateway device.
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Board Specifications
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- Rockchip RK3568
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- 2 or 4GB LPDDR4X
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- 8GB or 16GB eMMC, SD card slot
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- GbE LAN (Native)
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- 2x 2.5G LAN (PCIe)
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- M.2 Connector
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- HDMI 2.0, MIPI DSI/CSI
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- 2xUSB 3.0 Host
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- USB Type C PD, 5V/9V/12V
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- GPIO: 12-pin 0.5mm FPC connector
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Based on Tianling Shen's <cnsztl@gmail.com> work.
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Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Link: https://lore.kernel.org/r/20230308063240.107178-2-anarsoul@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3568-nanopi-r5s.dts | 713 ++++++++++++++++++
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2 files changed, 714 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -74,4 +74,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
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@@ -0,0 +1,713 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+/*
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+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyelec.com)
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+ *
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+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R5S";
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+ compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
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+
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+ aliases {
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+ ethernet0 = &gmac0;
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+ mmc0 = &sdmmc0;
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+ mmc1 = &sdhci;
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+ };
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
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+
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+ led-lan1 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_LAN;
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+ function-enumerator = <1>;
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+ gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ led-lan2 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_LAN;
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+ function-enumerator = <2>;
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+ gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ power_led: led-power {
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+ color = <LED_COLOR_ID_RED>;
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+ function = LED_FUNCTION_POWER;
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+ linux,default-trigger = "heartbeat";
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+ gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ led-wan {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_WAN;
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+ gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ vdd_usbc: vdd-usbc-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_usbc";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vdd_usbc>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vdd_usbc>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_pcie";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ startup-delay-us = <200000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_usb: vcc5v0-usb-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vdd_usbc>;
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+ };
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+
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+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_host_en>;
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+ regulator-name = "vcc5v0_usb_host";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_usb>;
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+ };
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+
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+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
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+ regulator-name = "vcc5v0_usb_otg";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_usb>;
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+ };
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+
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+ pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+};
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+
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+&combphy0 {
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&gmac0 {
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+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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+ assigned-clock-rates = <0>, <125000000>;
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+ clock_in_out = "output";
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+ phy-handle = <&rgmii_phy0>;
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+ phy-mode = "rgmii-id";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac0_miim
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+ &gmac0_tx_bus2
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+ &gmac0_rx_bus2
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+ &gmac0_rgmii_clk
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+ &gmac0_rgmii_bus>;
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+ snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 15ms, 50ms for rtl8211f */
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+ snps,reset-delays-us = <0 15000 50000>;
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+ tx_delay = <0x3c>;
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+ rx_delay = <0x2f>;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ vdd_cpu: regulator@1c {
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+ compatible = "tcs,tcs4525";
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+ reg = <0x1c>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>;
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+ rockchip,system-power-controller;
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+ wakeup-source;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
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|
+ regulator-always-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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|
+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_npu: DCDC_REG4 {
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+ regulator-name = "vdd_npu";
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_1v8: DCDC_REG5 {
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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||
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+ regulator-boot-on;
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||
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+ regulator-min-microvolt = <1800000>;
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||
|
+ regulator-max-microvolt = <1800000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vdda0v9_image: LDO_REG1 {
|
||
|
+ regulator-name = "vdda0v9_image";
|
||
|
+ regulator-min-microvolt = <950000>;
|
||
|
+ regulator-max-microvolt = <950000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vdda_0v9: LDO_REG2 {
|
||
|
+ regulator-name = "vdda_0v9";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+ regulator-min-microvolt = <900000>;
|
||
|
+ regulator-max-microvolt = <900000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vdda0v9_pmu: LDO_REG3 {
|
||
|
+ regulator-name = "vdda0v9_pmu";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+ regulator-min-microvolt = <900000>;
|
||
|
+ regulator-max-microvolt = <900000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-on-in-suspend;
|
||
|
+ regulator-suspend-microvolt = <900000>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vccio_acodec: LDO_REG4 {
|
||
|
+ regulator-name = "vccio_acodec";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-min-microvolt = <3300000>;
|
||
|
+ regulator-max-microvolt = <3300000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vccio_sd: LDO_REG5 {
|
||
|
+ regulator-name = "vccio_sd";
|
||
|
+ regulator-min-microvolt = <1800000>;
|
||
|
+ regulator-max-microvolt = <3300000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcc3v3_pmu: LDO_REG6 {
|
||
|
+ regulator-name = "vcc3v3_pmu";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+ regulator-min-microvolt = <3300000>;
|
||
|
+ regulator-max-microvolt = <3300000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-on-in-suspend;
|
||
|
+ regulator-suspend-microvolt = <3300000>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcca_1v8: LDO_REG7 {
|
||
|
+ regulator-name = "vcca_1v8";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+ regulator-min-microvolt = <1800000>;
|
||
|
+ regulator-max-microvolt = <1800000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcca1v8_pmu: LDO_REG8 {
|
||
|
+ regulator-name = "vcca1v8_pmu";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+ regulator-min-microvolt = <1800000>;
|
||
|
+ regulator-max-microvolt = <1800000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-on-in-suspend;
|
||
|
+ regulator-suspend-microvolt = <1800000>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcca1v8_image: LDO_REG9 {
|
||
|
+ regulator-name = "vcca1v8_image";
|
||
|
+ regulator-min-microvolt = <1800000>;
|
||
|
+ regulator-max-microvolt = <1800000>;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcc_3v3: SWITCH_REG1 {
|
||
|
+ regulator-name = "vcc_3v3";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ vcc3v3_sd: SWITCH_REG2 {
|
||
|
+ regulator-name = "vcc3v3_sd";
|
||
|
+ regulator-always-on;
|
||
|
+ regulator-boot-on;
|
||
|
+
|
||
|
+ regulator-state-mem {
|
||
|
+ regulator-off-in-suspend;
|
||
|
+ };
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&i2c5 {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ hym8563: rtc@51 {
|
||
|
+ compatible = "haoyu,hym8563";
|
||
|
+ reg = <0x51>;
|
||
|
+ interrupt-parent = <&gpio0>;
|
||
|
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||
|
+ #clock-cells = <0>;
|
||
|
+ clock-output-names = "rtcic_32kout";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&hym8563_int>;
|
||
|
+ wakeup-source;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&i2s0_8ch {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&i2s1_8ch {
|
||
|
+ rockchip,trcm-sync-tx-only;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&mdio0 {
|
||
|
+ rgmii_phy0: ethernet-phy@1 {
|
||
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||
|
+ reg = <1>;
|
||
|
+ pinctrl-0 = <ð_phy0_reset_pin>;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ reset-assert-us = <10000>;
|
||
|
+ reset-deassert-us = <50000>;
|
||
|
+ reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&pcie2x1 {
|
||
|
+ num-lanes = <1>;
|
||
|
+ reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&pcie30phy {
|
||
|
+ data-lanes = <1 2>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&pcie3x1 {
|
||
|
+ num-lanes = <1>;
|
||
|
+ reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||
|
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&pcie3x2 {
|
||
|
+ num-lanes = <1>;
|
||
|
+ num-ib-windows = <8>;
|
||
|
+ num-ob-windows = <8>;
|
||
|
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||
|
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&pinctrl {
|
||
|
+ gmac0 {
|
||
|
+ eth_phy0_reset_pin: eth-phy0-reset-pin {
|
||
|
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio-leds {
|
||
|
+ lan1_led_pin: lan1-led-pin {
|
||
|
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+
|
||
|
+ lan2_led_pin: lan2-led-pin {
|
||
|
+ rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+
|
||
|
+ power_led_pin: power-led-pin {
|
||
|
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+
|
||
|
+ wan_led_pin: wan-led-pin {
|
||
|
+ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ hym8563 {
|
||
|
+ hym8563_int: hym8563-int {
|
||
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ pmic {
|
||
|
+ pmic_int: pmic-int {
|
||
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ usb {
|
||
|
+ vcc5v0_usb_host_en: vcc5v0-usb-host-en {
|
||
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
|
||
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&pmu_io_domains {
|
||
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||
|
+ vccio1-supply = <&vccio_acodec>;
|
||
|
+ vccio3-supply = <&vccio_sd>;
|
||
|
+ vccio4-supply = <&vcc_1v8>;
|
||
|
+ vccio5-supply = <&vcc_3v3>;
|
||
|
+ vccio6-supply = <&vcc_1v8>;
|
||
|
+ vccio7-supply = <&vcc_3v3>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&saradc {
|
||
|
+ vref-supply = <&vcca_1v8>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdhci {
|
||
|
+ bus-width = <8>;
|
||
|
+ max-frequency = <200000000>;
|
||
|
+ non-removable;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc0 {
|
||
|
+ max-frequency = <150000000>;
|
||
|
+ no-sdio;
|
||
|
+ no-mmc;
|
||
|
+ bus-width = <4>;
|
||
|
+ cap-mmc-highspeed;
|
||
|
+ cap-sd-highspeed;
|
||
|
+ disable-wp;
|
||
|
+ vmmc-supply = <&vcc3v3_sd>;
|
||
|
+ vqmmc-supply = <&vccio_sd>;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&tsadc {
|
||
|
+ rockchip,hw-tshut-mode = <1>;
|
||
|
+ rockchip,hw-tshut-polarity = <0>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&uart2 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host0_ehci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host0_ohci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host0_xhci {
|
||
|
+ extcon = <&usb2phy0>;
|
||
|
+ dr_mode = "host";
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host1_ehci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host1_ohci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host1_xhci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy0 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy0_host {
|
||
|
+ phy-supply = <&vcc5v0_usb_host>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy0_otg {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy1 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy1_host {
|
||
|
+ phy-supply = <&vcc5v0_usb_otg>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb2phy1_otg {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vop {
|
||
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vop_mmu {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vp0 {
|
||
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
||
|
+ };
|
||
|
+};
|