2019-08-13 06:30:29 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
|
|
|
|
#include "mt7621.dtsi"
|
|
|
|
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
|
|
|
|
/ {
|
|
|
|
compatible = "adslr,g7", "mediatek,mt7621-soc";
|
|
|
|
model = "ADSLR G7";
|
|
|
|
|
|
|
|
aliases {
|
|
|
|
led-boot = &led_sys;
|
|
|
|
led-failsafe = &led_sys;
|
|
|
|
led-running = &led_sys;
|
|
|
|
led-upgrade = &led_sys;
|
2020-03-18 15:38:58 +00:00
|
|
|
label-mac-device = &gmac0;
|
2019-08-13 06:30:29 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
|
|
|
led_sys: sys {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "blue:sys";
|
2020-03-03 21:22:24 +00:00
|
|
|
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
|
2019-08-13 06:30:29 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
keys {
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
reset {
|
|
|
|
label = "reset";
|
2020-03-03 21:22:24 +00:00
|
|
|
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
|
2019-08-13 06:30:29 +00:00
|
|
|
debounce-interval = <60>;
|
|
|
|
linux,code = <KEY_RESTART>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&spi0 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
flash@0 {
|
|
|
|
compatible = "jedec,spi-nor";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <40000000>;
|
|
|
|
|
|
|
|
partitions {
|
|
|
|
compatible = "fixed-partitions";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
partition@0 {
|
|
|
|
label = "u-boot";
|
|
|
|
reg = <0x0 0x30000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@30000 {
|
|
|
|
label = "u-boot-env";
|
|
|
|
reg = <0x30000 0x10000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
|
2024-02-17 14:10:10 +00:00
|
|
|
partition@40000 {
|
2019-08-13 06:30:29 +00:00
|
|
|
label = "factory";
|
|
|
|
reg = <0x40000 0x10000>;
|
|
|
|
read-only;
|
2023-10-02 02:12:02 +00:00
|
|
|
|
2023-11-07 23:55:58 +00:00
|
|
|
nvmem-layout {
|
|
|
|
compatible = "fixed-layout";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2023-10-02 02:12:02 +00:00
|
|
|
|
2023-11-07 23:55:58 +00:00
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
|
|
reg = <0x0 0x4da8>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom_factory_8000: eeprom@8000 {
|
|
|
|
reg = <0x8000 0x4da8>;
|
|
|
|
};
|
2023-10-02 02:12:02 +00:00
|
|
|
|
2023-11-07 23:55:58 +00:00
|
|
|
macaddr_factory_e00c: macaddr@e00c {
|
2023-11-08 03:39:00 +00:00
|
|
|
compatible = "mac-base";
|
2023-11-07 23:55:58 +00:00
|
|
|
reg = <0xe00c 0x6>;
|
2023-11-08 03:39:00 +00:00
|
|
|
#nvmem-cell-cells = <1>;
|
2023-11-07 23:55:58 +00:00
|
|
|
};
|
2023-10-02 02:12:02 +00:00
|
|
|
};
|
2019-08-13 06:30:29 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
partition@50000 {
|
|
|
|
compatible = "denx,uimage";
|
|
|
|
label = "firmware";
|
|
|
|
reg = <0x50000 0xfb0000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie0 {
|
|
|
|
wifi@0,0 {
|
|
|
|
compatible = "mediatek,mt76";
|
|
|
|
reg = <0x0000 0 0 0 0>;
|
2023-10-02 02:12:02 +00:00
|
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
|
|
nvmem-cell-names = "eeprom";
|
2019-08-13 06:30:29 +00:00
|
|
|
ieee80211-freq-limit = <2400000 2500000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie1 {
|
|
|
|
wifi@0,0 {
|
|
|
|
compatible = "mediatek,mt76";
|
|
|
|
reg = <0x0000 0 0 0 0>;
|
2023-10-02 02:12:02 +00:00
|
|
|
nvmem-cells = <&eeprom_factory_8000>;
|
|
|
|
nvmem-cell-names = "eeprom";
|
2019-08-13 06:30:29 +00:00
|
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2020-03-18 15:38:58 +00:00
|
|
|
&gmac0 {
|
2023-11-08 03:39:00 +00:00
|
|
|
nvmem-cells = <&macaddr_factory_e00c 0>;
|
2021-04-02 21:50:02 +00:00
|
|
|
nvmem-cell-names = "mac-address";
|
2019-08-13 06:30:29 +00:00
|
|
|
};
|
|
|
|
|
2022-07-05 22:20:32 +00:00
|
|
|
&gmac1 {
|
|
|
|
status = "okay";
|
|
|
|
label = "wan";
|
|
|
|
phy-handle = <ðphy4>;
|
|
|
|
|
2023-11-08 03:39:00 +00:00
|
|
|
nvmem-cells = <&macaddr_factory_e00c 1>;
|
2022-07-05 22:20:32 +00:00
|
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
};
|
|
|
|
|
|
|
|
&mdio {
|
|
|
|
ethphy4: ethernet-phy@4 {
|
|
|
|
reg = <4>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2020-03-18 15:38:58 +00:00
|
|
|
&switch0 {
|
|
|
|
ports {
|
|
|
|
port@0 {
|
|
|
|
status = "okay";
|
|
|
|
label = "lan1";
|
|
|
|
};
|
|
|
|
|
|
|
|
port@1 {
|
|
|
|
status = "okay";
|
|
|
|
label = "lan2";
|
|
|
|
};
|
|
|
|
|
|
|
|
port@2 {
|
|
|
|
status = "okay";
|
|
|
|
label = "lan3";
|
|
|
|
};
|
|
|
|
|
|
|
|
port@3 {
|
|
|
|
status = "okay";
|
|
|
|
label = "lan4";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2019-12-22 20:26:01 +00:00
|
|
|
&state_default {
|
|
|
|
gpio {
|
2020-04-04 06:52:12 +00:00
|
|
|
groups = "i2c", "uart3", "wdt";
|
2020-03-13 13:27:03 +00:00
|
|
|
function = "gpio";
|
2019-08-13 06:30:29 +00:00
|
|
|
};
|
|
|
|
};
|