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149 lines
2.4 KiB
Plaintext
149 lines
2.4 KiB
Plaintext
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#include "mt7628an.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "wavlink,wl-wn531a3", "mediatek,mt7628an-soc";
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model = "Wavlink WL-WN531A3";
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aliases {
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led-boot = &led_status_blue;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_red;
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};
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keys {
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compatible = "gpio-keys";
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turbo {
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label = "turbo";
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gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_1>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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touchlink {
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label = "touchlink";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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};
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leds {
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compatible = "gpio-leds";
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wifi {
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label = "blue:wifi";
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gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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led_status_blue: led_status_blue {
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label = "blue:status";
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gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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};
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led_status_red: led_status_red {
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label = "red:status";
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gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "wled_an", "gpio", "wdt";
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function = "gpio";
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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};
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};
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&wmac {
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status = "okay";
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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ðernet {
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nvmem-cells = <&macaddr_factory_28>;
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nvmem-cell-names = "mac-address";
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};
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&esw {
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mediatek,portmap = <0x2f>;
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_28: macaddr@28 {
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reg = <0x28 0x6>;
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};
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};
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