openwrt/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "ar9344.dtsi"

/ {
	aliases {
		led-boot = &system;
		led-failsafe = &system;
		led-running = &system;
		led-upgrade = &system;
	};

	leds: leds {
		compatible = "gpio-leds";

		wlan2g {
			label = "tp-link:green:wlan2g";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		system: system {
			label = "tp-link:green:system";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		qss {
			label = "tp-link:green:qss";
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};
	};

	ath9k-leds {
		compatible = "gpio-leds";

		wlan5g {
			label = "tp-link:green:wlan5g";
			gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};

		wifi {
			linux,code = <KEY_RFKILL>;
			linux,input-type = <EV_SW>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};
};

&ref {
	clock-frequency = <40000000>;
};

&uart {
	status = "okay";
};

&spi {
	num-cs = <1>;

	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			uboot: partition@0 {
				label = "u-boot";
				reg = <0x000000 0x020000>;
				read-only;
			};

			partition@20000 {
				compatible = "tplink,firmware";
				label = "firmware";
				reg = <0x020000 0x7d0000>;
			};

			art: partition@7f0000 {
				label = "art";
				reg = <0x7f0000 0x010000>;
				read-only;
			};
		};
	};
};

&pcie {
	status = "okay";

	ath9k: wifi@0,0 {
		compatible = "pci168c,0033";
		reg = <0x0000 0 0 0 0>;
		qca,no-eeprom;
		#gpio-cells = <2>;
		gpio-controller;
	};
};

&wmac {
	status = "okay";

	mtd-cal-data = <&art 0x1000>;
};