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56 lines
2.0 KiB
Diff
56 lines
2.0 KiB
Diff
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From acc8ac41d15594d4f735531c89bbeb03d85c344d Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 8 Oct 2020 16:06:08 +0200
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Subject: [PATCH] drm/vc4: hdmi: Properly compute the BVB clock rate
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The BVB clock rate computation doesn't take into account a mode clock of
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594MHz that we're going to need to support 4k60.
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Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
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Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++--------
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1 file changed, 9 insertions(+), 8 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -92,7 +92,6 @@
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# define VC4_HD_M_ENABLE BIT(0)
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#define CEC_CLOCK_FREQ 40000
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-#define VC4_HSM_MID_CLOCK 149985000
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static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
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{
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@@ -813,7 +812,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
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conn_state_to_vc4_hdmi_conn_state(conn_state);
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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- unsigned long pixel_rate, hsm_rate;
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+ unsigned long bvb_rate, pixel_rate, hsm_rate;
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int ret;
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ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
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@@ -862,12 +861,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
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vc4_hdmi_cec_update_clk_div(vc4_hdmi);
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- /*
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- * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
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- * at 300MHz.
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- */
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- vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock,
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- (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
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+ if (pixel_rate > 297000000)
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+ bvb_rate = 300000000;
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+ else if (pixel_rate > 148500000)
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+ bvb_rate = 150000000;
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+ else
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+ bvb_rate = 75000000;
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+
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+ vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate);
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if (IS_ERR(vc4_hdmi->bvb_req)) {
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DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req));
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clk_request_done(vc4_hdmi->hsm_req);
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