openwrt/target/linux/ramips/dts/mt7621_iptime_a8004t.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "iptime,a8004t", "mediatek,mt7621-soc";
	model = "ipTIME A8004T";

	aliases {
		led-boot = &led_cpu;
		led-failsafe = &led_cpu;
		led-running = &led_cpu;
		led-upgrade = &led_cpu;
	};

	leds {
		compatible = "gpio-leds";

		led_cpu: cpu {
			label = "orange:cpu";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "orange:wlan2g";
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0radio";
		};

		wlan5g {
			label = "orange:wlan5g";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1radio";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			uboot: partition@0 {
				label = "u-boot";
				reg = <0x0 0x20000>;
				read-only;
			};

			partition@20000 {
				label = "config";
				reg = <0x20000 0x10000>;
				read-only;
			};

			factory: partition@30000 {
				label = "factory";
				reg = <0x30000 0x10000>;
				read-only;
			};

			partition@40000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x40000 0xfc0000>;
			};
		};
	};
};

&gmac0 {
	nvmem-cells = <&macaddr_uboot_1fc20>;
	nvmem-cell-names = "mac-address";
};

&switch0 {
	ports {
		port@0 {
			status = "okay";
			label = "wan";
			nvmem-cells = <&macaddr_uboot_1fc40>;
			nvmem-cell-names = "mac-address";
		};

		port@1 {
			status = "okay";
			label = "lan4";
		};

		port@2 {
			status = "okay";
			label = "lan3";
		};

		port@3 {
			status = "okay";
			label = "lan2";
		};

		port@4 {
			status = "okay";
			label = "lan1";
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x0000>;
		ieee80211-freq-limit = <2400000 2500000>;
	};
};

&pcie1 {
	wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&state_default {
	gpio {
		groups = "wdt", "jtag", "i2c";
		function = "gpio";
	};
};

&uboot {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_uboot_1fc20: macaddr@1fc20 {
		reg = <0x1fc20 0x6>;
	};

	macaddr_uboot_1fc40: macaddr@1fc40 {
		reg = <0x1fc40 0x6>;
	};
};