2021-11-04 20:52:43 +00:00
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From 5f008cb22f60da4e10375f22266c1a4e20b1252e Mon Sep 17 00:00:00 2001
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From: Alex Marginean <alexandru.marginean@nxp.com>
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Date: Fri, 20 Sep 2019 18:22:52 +0300
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Subject: [PATCH] drivers: net: phy: aquantia: fix system side protocol
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misconfiguration
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Do not set up protocols for speeds that are not supported by FW. Enabling
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these protocols leads to link issues on system side.
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Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
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---
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2023-11-19 11:52:55 +00:00
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drivers/net/phy/aquantia/aquantia_main.c | 8 +++++++-
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2021-11-04 20:52:43 +00:00
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1 file changed, 7 insertions(+), 1 deletion(-)
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2023-11-19 11:52:55 +00:00
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--- a/drivers/net/phy/aquantia/aquantia_main.c
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+++ b/drivers/net/phy/aquantia/aquantia_main.c
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@@ -285,10 +285,16 @@ static int aqr_config_aneg_set_prot(stru
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2021-11-04 20:52:43 +00:00
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phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
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aquantia_syscfg[if_type].start_rate);
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- for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++)
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+ for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) {
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+ u16 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1,
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+ AQUANTIA_VND1_GSYSCFG_BASE + i);
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+ if (!reg)
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+ continue;
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+
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phy_write_mmd(phydev, MDIO_MMD_VEND1,
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AQUANTIA_VND1_GSYSCFG_BASE + i,
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aquantia_syscfg[if_type].syscfg);
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+ }
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/* wake PHY back up */
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phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);
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