openwrt/target/linux/ath79/dts/qca9558_dlink_dap-2695-a1.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include <dt-bindings/leds/common.h>

#include "qca955x_dlink_dap-2xxx.dtsi"

/ {
	compatible = "dlink,dap-2695-a1", "qca,qca9558";
	model = "D-link DAP-2695-A1";

	aliases {
		led-boot = &led_power_red;
		led-failsafe = &led_power_red;
		led-running = &led_power_green;
		led-upgrade = &led_power_red;
	};

	leds {
		compatible = "gpio-leds";

		led_power_green: power_green {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		led_power_red: power_red {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};

		wifi2g {
			label = "green:wifi2g";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
		};
	};
};

&partitions {
	partition@70000 {
		label = "firmware";
		reg = <0x070000 0xf00000>;
		compatible = "wrg";
	};

	partition@f70000 {
		label = "captival";
		reg = <0xf70000 0x070000>;
		read-only;
	};

	partition@fe0000 {
		label = "certificate";
		reg = <0xfe0000 0x010000>;
		read-only;
	};
};

&mdio0 {
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;

		qca,ar8327-initvals = <
			0x04 0x07600000 /* PORT0_PAD_CTRL */
			0x0c 0x00080080 /* PORT6_PAD_CTRL */
			0x7c 0x0000007e /* PORT0_STATUS */
			0x94 0x0000007e /* PORT6_STATUS */
		>;
	};
};

&eth0 {
	status = "okay";

	phy-handle = <&phy0>;
	pll-data = <0x56000000 0x00000101 0x00001616>;

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&eth1 {
	status = "okay";

	pll-data = <0x03000101 0x00000101 0x00001616>;

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&pcie0 {
	status = "okay";

	wifi@0,0 {
		compatible = "qcom,ath10k";
		reg = <0 0 0 0 0>;

		nvmem-cells = <&cal_ath10k>;
		nvmem-cell-names = "calibration";
	};
};

&art {
	nvmem-layout {
		compatible = "fixed-layout";
		#address-cells = <1>;
		#size-cells = <1>;

		cal_ath9k: calibration@1000 {
			reg = <0x1000 0x440>;
		};

		cal_ath10k: calibration@5000 {
			reg = <0x5000 0x844>;
		};
	};
};