openwrt/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
/plugin/;

/ {
	compatible = "cmcc,rax3000m", "mediatek,mt7981";

	fragment@0 {
		target = <&gmac0>;
		__overlay__ {
			nvmem-cells = <&macaddr_factory_2a 0>;
			nvmem-cell-names = "mac-address";
		};
	};

	fragment@1 {
		target = <&gmac1>;
		__overlay__ {
			nvmem-cells = <&macaddr_factory_24 0>;
			nvmem-cell-names = "mac-address";
		};
	};

	fragment@2 {
		target = <&pio>;
		__overlay__ {
			spi0_flash_pins: spi0-pins {
				mux {
					function = "spi";
					groups = "spi0", "spi0_wp_hold";
				};

				conf-pu {
					pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
					drive-strength = <8>;
					mediatek,pull-up-adv = <0>; /* bias-disable */
				};

				conf-pd {
					pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
					drive-strength = <8>;
					mediatek,pull-up-adv = <0>; /* bias-disable */
				};
			};
		};
	};

	fragment@3 {
		target = <&spi0>;
		__overlay__ {
			pinctrl-names = "default";
			pinctrl-0 = <&spi0_flash_pins>;
			status = "okay";

			spi_nand@0 {
				compatible = "spi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0>;

				spi-max-frequency = <52000000>;
				spi-tx-bus-width = <4>;
				spi-rx-bus-width = <4>;

				partitions {
					compatible = "fixed-partitions";
					#address-cells = <1>;
					#size-cells = <1>;

					partition@0 {
						label = "bl2";
						reg = <0x00000 0x0100000>;
						read-only;
					};

					partition@100000 {
						label = "u-boot-env";
						reg = <0x100000 0x80000>;
					};

					factory: partition@180000 {
						label = "factory";
						reg = <0x180000 0x200000>;
						read-only;

						nvmem-layout {
							compatible = "fixed-layout";
							#address-cells = <1>;
							#size-cells = <1>;

							macaddr_factory_24: macaddr@24 {
								compatible = "mac-base";
								reg = <0x24 0x6>;
								#nvmem-cell-cells = <1>;
							};

							macaddr_factory_2a: macaddr@2a {
								compatible = "mac-base";
								reg = <0x2a 0x6>;
								#nvmem-cell-cells = <1>;
							};
						};
					};

					partition@380000 {
						label = "fip";
						reg = <0x380000 0x200000>;
						read-only;
					};

					partition@580000 {
						label = "ubi";
						reg = <0x580000 0x7200000>;
					};
				};
			};
		};
	};

	fragment@4 {
		target = <&wifi>;
		__overlay__ {
			mediatek,mtd-eeprom = <&factory 0x0>;
		};
	};
};