2020-06-11 07:07:04 +00:00
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From d00358d7a1c50718232799e1ee10955bcd73795a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Tue, 12 May 2020 09:57:33 +0200
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Subject: [PATCH] mtd: rawnand: brcmnand: improve hamming oob layout
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The current code generates 8 oob sections:
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S1 1-5
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ECC 6-8
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S2 9-15
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S3 16-21
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ECC 22-24
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S4 25-31
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S5 32-37
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ECC 38-40
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S6 41-47
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S7 48-53
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ECC 54-56
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S8 57-63
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Change it by merging continuous sections:
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S1 1-5
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ECC 6-8
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S2 9-21
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ECC 22-24
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S3 25-37
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ECC 38-40
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S4 41-53
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ECC 54-56
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S5 57-63
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Link: https://lore.kernel.org/linux-mtd/20200512075733.745374-3-noltari@gmail.com
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---
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drivers/mtd/nand/raw/brcmnand/brcmnand.c | 35 +++++++++++-------------
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1 file changed, 16 insertions(+), 19 deletions(-)
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2020-05-14 16:19:35 +00:00
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--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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2020-08-11 16:13:19 +00:00
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@@ -1004,33 +1004,30 @@ static int brcmnand_hamming_ooblayout_fr
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2020-05-14 16:19:35 +00:00
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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+ u32 next;
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- if (section >= sectors * 2)
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+ if (section > sectors)
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return -ERANGE;
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- oobregion->offset = (section / 2) * sas;
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+ next = (section * sas);
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+ if (section < sectors)
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+ next += 6;
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- if (section & 1) {
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- oobregion->offset += 9;
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- oobregion->length = 7;
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+ if (section) {
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+ oobregion->offset = ((section - 1) * sas) + 9;
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} else {
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- oobregion->length = 6;
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-
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- /* First sector of each page may have BBI */
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- if (!section) {
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- /*
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- * Small-page NAND use byte 6 for BBI while large-page
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- * NAND use bytes 0 and 1.
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- */
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- if (cfg->page_size > 512) {
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- oobregion->offset += 2;
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- oobregion->length -= 2;
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- } else {
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- oobregion->length--;
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- }
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+ if (cfg->page_size > 512) {
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+ /* Large page NAND uses first 2 bytes for BBI */
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+ oobregion->offset = 2;
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+ } else {
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+ /* Small page NAND uses last byte before ECC for BBI */
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+ oobregion->offset = 0;
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+ next--;
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}
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}
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+ oobregion->length = next - oobregion->offset;
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+
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return 0;
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}
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