2024-09-01 14:06:29 +00:00
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From 146eb94a08d12b5831e1d30455469750f7c5f2a3 Mon Sep 17 00:00:00 2001
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From: "minda.chen" <minda.chen@starfivetech.com>
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Date: Tue, 18 Oct 2022 09:57:39 +0800
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Subject: [PATCH 109/116] usb:xhci:To improve performance,usb using lowmem for
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bulk xfer.
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Generate an usb low memory pool for usb 3.0 host
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read/write transfer, default size is 8M.
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Signed-off-by: minda.chen <minda.chen@starfivetech.com>
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---
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arch/riscv/boot/dts/starfive/jh7110-evb.dts | 1 +
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drivers/usb/core/hcd.c | 4 +-
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drivers/usb/host/xhci-mem.c | 64 +++++++++++++++++++++
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drivers/usb/host/xhci-plat.c | 8 +++
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drivers/usb/host/xhci-ring.c | 3 +-
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drivers/usb/host/xhci.c | 57 +++++++++++++++++-
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drivers/usb/host/xhci.h | 11 ++++
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7 files changed, 145 insertions(+), 3 deletions(-)
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--- a/arch/riscv/boot/dts/starfive/jh7110-evb.dts
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+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
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@@ -31,5 +31,6 @@
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};
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&usb0 {
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+ xhci-lowmem-pool;
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status = "okay";
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};
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--- a/drivers/usb/core/hcd.c
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+++ b/drivers/usb/core/hcd.c
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@@ -1439,7 +1439,9 @@ int usb_hcd_map_urb_for_dma(struct usb_h
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if (ret == 0)
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urb->transfer_flags |= URB_MAP_LOCAL;
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} else if (hcd_uses_dma(hcd)) {
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- if (urb->num_sgs) {
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+ if (urb->transfer_flags & URB_MAP_LOCAL)
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+ return ret;
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+ else if (urb->num_sgs) {
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int n;
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/* We don't support sg for isoc transfers ! */
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--- a/drivers/usb/host/xhci-mem.c
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+++ b/drivers/usb/host/xhci-mem.c
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@@ -14,6 +14,7 @@
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#include <linux/slab.h>
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#include <linux/dmapool.h>
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#include <linux/dma-mapping.h>
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+#include <linux/genalloc.h>
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#include "xhci.h"
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#include "xhci-trace.h"
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@@ -1842,6 +1843,7 @@ xhci_free_interrupter(struct xhci_hcd *x
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void xhci_mem_cleanup(struct xhci_hcd *xhci)
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{
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struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
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+ struct xhci_lowmem_pool *pool;
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int i, j, num_ports;
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cancel_delayed_work_sync(&xhci->cmd_timer);
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@@ -1887,6 +1889,13 @@ void xhci_mem_cleanup(struct xhci_hcd *x
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Freed medium stream array pool");
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+ if (xhci->lowmem_pool.pool) {
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+ pool = &xhci->lowmem_pool;
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+ dma_free_coherent(dev, pool->size, (void *)pool->cached_base, pool->dma_addr);
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+ gen_pool_destroy(pool->pool);
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+ pool->pool = NULL;
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+ }
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+
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if (xhci->dcbaa)
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dma_free_coherent(dev, sizeof(*xhci->dcbaa),
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xhci->dcbaa, xhci->dcbaa->dma);
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2024-10-04 19:39:07 +00:00
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@@ -2300,6 +2309,55 @@ xhci_add_interrupter(struct xhci_hcd *xh
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2024-09-01 14:06:29 +00:00
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return 0;
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}
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+int xhci_setup_local_lowmem(struct xhci_hcd *xhci, size_t size)
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+{
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+ int err;
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+ void *buffer;
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+ dma_addr_t dma_addr;
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+ struct usb_hcd *hcd = xhci_to_hcd(xhci);
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+ struct xhci_lowmem_pool *pool = &xhci->lowmem_pool;
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+
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+ if (!pool->pool) {
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+ /* minimal alloc one page */
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+ pool->pool = gen_pool_create(PAGE_SHIFT, dev_to_node(hcd->self.sysdev));
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+ if (IS_ERR(pool->pool))
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+ return PTR_ERR(pool->pool);
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+ }
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+
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+ buffer = dma_alloc_coherent(hcd->self.sysdev, size, &dma_addr,
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+ GFP_KERNEL | GFP_DMA32);
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+
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+ if (IS_ERR(buffer)) {
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+ err = PTR_ERR(buffer);
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+ goto destroy_pool;
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+ }
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+
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+ /*
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+ * Here we pass a dma_addr_t but the arg type is a phys_addr_t.
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+ * It's not backed by system memory and thus there's no kernel mapping
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+ * for it.
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+ */
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+ err = gen_pool_add_virt(pool->pool, (unsigned long)buffer,
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+ dma_addr, size, dev_to_node(hcd->self.sysdev));
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+ if (err < 0) {
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+ dev_err(hcd->self.sysdev, "gen_pool_add_virt failed with %d\n",
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+ err);
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+ dma_free_coherent(hcd->self.sysdev, size, buffer, dma_addr);
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+ goto destroy_pool;
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+ }
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+
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+ pool->cached_base = (u64)buffer;
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+ pool->dma_addr = dma_addr;
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+
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+ return 0;
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+
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+destroy_pool:
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+ gen_pool_destroy(pool->pool);
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+ pool->pool = NULL;
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+ return err;
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+}
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+EXPORT_SYMBOL_GPL(xhci_setup_local_lowmem);
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+
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int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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{
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dma_addr_t dma;
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2024-10-04 19:39:07 +00:00
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@@ -2436,6 +2494,12 @@ int xhci_mem_init(struct xhci_hcd *xhci,
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2024-09-01 14:06:29 +00:00
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xhci->isoc_bei_interval = AVOID_BEI_INTERVAL_MAX;
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+ if (xhci->quirks & XHCI_LOCAL_BUFFER) {
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+ if (xhci_setup_local_lowmem(xhci,
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+ xhci->lowmem_pool.size))
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+ goto fail;
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+ }
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+
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/*
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* XXX: Might need to set the Interrupter Moderation Register to
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* something other than the default (~1ms minimum between interrupts).
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--- a/drivers/usb/host/xhci-plat.c
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+++ b/drivers/usb/host/xhci-plat.c
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@@ -253,6 +253,14 @@ int xhci_plat_probe(struct platform_devi
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if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk"))
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xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK;
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+ if (device_property_read_bool(tmpdev, "xhci-lowmem-pool")) {
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+ xhci->quirks |= XHCI_LOCAL_BUFFER;
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+ if (device_property_read_u32(tmpdev, "lowmem-pool-size",
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+ &xhci->lowmem_pool.size)) {
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+ xhci->lowmem_pool.size = 8 << 20;
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+ } else
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+ xhci->lowmem_pool.size <<= 20;
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+ }
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device_property_read_u32(tmpdev, "imod-interval-ns",
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&xhci->imod_interval);
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}
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--- a/drivers/usb/host/xhci-ring.c
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+++ b/drivers/usb/host/xhci-ring.c
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2024-10-04 19:39:07 +00:00
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@@ -3664,7 +3664,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
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2024-09-01 14:06:29 +00:00
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full_len = urb->transfer_buffer_length;
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/* If we have scatter/gather list, we use it. */
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- if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) {
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+ if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)
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+ && !(urb->transfer_flags & URB_MAP_LOCAL)) {
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num_sgs = urb->num_mapped_sgs;
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sg = urb->sg;
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addr = (u64) sg_dma_address(sg);
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--- a/drivers/usb/host/xhci.c
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+++ b/drivers/usb/host/xhci.c
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@@ -18,6 +18,8 @@
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#include <linux/slab.h>
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#include <linux/dmi.h>
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#include <linux/dma-mapping.h>
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+#include <linux/dma-map-ops.h>
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+#include <linux/genalloc.h>
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#include "xhci.h"
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#include "xhci-trace.h"
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@@ -1285,6 +1287,55 @@ static void xhci_unmap_temp_buf(struct u
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urb->transfer_buffer = NULL;
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}
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+static void xhci_map_urb_local(struct usb_hcd *hcd, struct urb *urb,
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+ gfp_t mem_flags)
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+{
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+ void *buffer;
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+ dma_addr_t dma_handle;
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+ struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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+ struct xhci_lowmem_pool *lowmem_pool = &xhci->lowmem_pool;
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+
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+ if (lowmem_pool->pool
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+ && (usb_endpoint_type(&urb->ep->desc) == USB_ENDPOINT_XFER_BULK)
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+ && (urb->transfer_buffer_length > PAGE_SIZE)
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+ && urb->num_sgs && urb->sg && (sg_phys(urb->sg) > 0xffffffff)) {
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+ buffer = gen_pool_dma_alloc(lowmem_pool->pool,
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+ urb->transfer_buffer_length, &dma_handle);
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+ if (buffer) {
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+ urb->transfer_dma = dma_handle;
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+ urb->transfer_buffer = buffer;
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+ urb->transfer_flags |= URB_MAP_LOCAL;
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+ if (usb_urb_dir_out(urb))
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+ sg_copy_to_buffer(urb->sg, urb->num_sgs,
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+ (void *)buffer,
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+ urb->transfer_buffer_length);
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+ }
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+ }
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+
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+}
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+
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+static void xhci_unmap_urb_local(struct usb_hcd *hcd, struct urb *urb)
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+{
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+ dma_addr_t dma_handle;
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+ u64 cached_buffer;
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+ struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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+ struct xhci_lowmem_pool *lowmem_pool = &xhci->lowmem_pool;
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+
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+ if (urb->transfer_flags & URB_MAP_LOCAL) {
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+ dma_handle = urb->transfer_dma;
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+ cached_buffer = lowmem_pool->cached_base +
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+ ((u32)urb->transfer_dma & (lowmem_pool->size - 1));
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+ if (usb_urb_dir_in(urb))
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+ sg_copy_from_buffer(urb->sg, urb->num_sgs,
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+ (void *)cached_buffer, urb->transfer_buffer_length);
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+ gen_pool_free(lowmem_pool->pool, (unsigned long)urb->transfer_buffer,
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+ urb->transfer_buffer_length);
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+ urb->transfer_flags &= ~URB_MAP_LOCAL;
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+ urb->transfer_buffer = NULL;
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+ }
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+}
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+
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+
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/*
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* Bypass the DMA mapping if URB is suitable for Immediate Transfer (IDT),
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* we'll copy the actual data into the TRB address register. This is limited to
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@@ -1305,9 +1356,11 @@ static int xhci_map_urb_for_dma(struct u
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if (xhci_urb_temp_buffer_required(hcd, urb))
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return xhci_map_temp_buffer(hcd, urb);
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}
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+ xhci_map_urb_local(hcd, urb, mem_flags);
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return usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
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}
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+
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static void xhci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
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{
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struct xhci_hcd *xhci;
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@@ -1320,8 +1373,10 @@ static void xhci_unmap_urb_for_dma(struc
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if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf)
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xhci_unmap_temp_buf(hcd, urb);
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- else
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+ else {
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+ xhci_unmap_urb_local(hcd, urb);
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usb_hcd_unmap_urb_for_dma(hcd, urb);
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+ }
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}
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/**
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--- a/drivers/usb/host/xhci.h
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+++ b/drivers/usb/host/xhci.h
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2024-11-03 07:53:37 +00:00
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@@ -1508,6 +1508,13 @@ struct xhci_hub {
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2024-09-01 14:06:29 +00:00
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u8 min_rev;
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};
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+struct xhci_lowmem_pool {
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+ struct gen_pool *pool;
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+ u64 cached_base;
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+ dma_addr_t dma_addr;
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+ unsigned int size;
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+};
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+
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/* There is one xhci_hcd structure per controller */
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struct xhci_hcd {
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struct usb_hcd *main_hcd;
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2024-11-03 07:53:37 +00:00
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@@ -1661,6 +1668,8 @@ struct xhci_hcd {
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2024-10-04 19:39:07 +00:00
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#define XHCI_WRITE_64_HI_LO BIT_ULL(47)
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#define XHCI_CDNS_SCTX_QUIRK BIT_ULL(48)
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2024-09-01 14:06:29 +00:00
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+#define XHCI_LOCAL_BUFFER BIT_ULL(63)
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+
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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struct xhci_port *hw_ports;
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2024-11-03 07:53:37 +00:00
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@@ -1690,6 +1699,8 @@ struct xhci_hcd {
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2024-09-01 14:06:29 +00:00
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struct list_head regset_list;
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void *dbc;
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+ struct xhci_lowmem_pool lowmem_pool;
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+
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/* platform-specific data -- must come last */
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unsigned long priv[] __aligned(sizeof(s64));
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};
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