openwrt/target/linux/starfive/patches-6.6/0096-Add-ISP-control-for-video2-and-video3.patch

From 04eff0f76091015cbecd39de41d45c493e7a91db Mon Sep 17 00:00:00 2001
From: "zejian.su" <zejian.su@starfivetech.com>
Date: Mon, 30 Oct 2023 16:09:58 +0800
Subject: [PATCH 096/116] Add ISP control for video2 and video3.

Signed-off-by: zejian.su <zejian.su@starfivetech.com>
---
 .../platform/starfive/v4l2_driver/stf_isp.c   | 46 +++++++++++++++++++
 include/uapi/linux/jh7110-isp.h               | 23 ++++++++++
 2 files changed, 69 insertions(+)

--- a/drivers/media/platform/starfive/v4l2_driver/stf_isp.c
+++ b/drivers/media/platform/starfive/v4l2_driver/stf_isp.c
@@ -725,6 +725,24 @@ static int isp_set_ctrl_sc(struct stf_is
 	return 0;
 }
 
+static int isp_set_ctrl_outss(struct stf_isp_dev *isp_dev, const void * value)
+{
+	const struct jh7110_isp_outss_setting * setting = (const struct jh7110_isp_outss_setting *)value;
+	struct stf_vin_dev *vin = isp_dev->stfcamss->vin;
+	void __iomem *ispbase = vin->isp_base;
+	u32 reg_addr = !setting->which ? 0xa9c : 0xab4;
+
+	if(!setting->stride)
+		return 0;
+
+	// Output Image Stride Register, 8-byte(64bit) granularity.
+	reg_write(ispbase, reg_addr, setting->stride);
+	reg_write(ispbase, reg_addr + 4, ((setting->hsm << 16) | (setting->hsm & 0x3)));
+	reg_write(ispbase, reg_addr + 8, ((setting->vsm << 16) | (setting->vsm & 0x3)));
+
+	return 0;
+}
+
 static int isp_s_ctrl(struct v4l2_ctrl *ctrl)
 {
 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
@@ -822,6 +840,10 @@ static int isp_s_ctrl(struct v4l2_ctrl *
 	case V4L2_CID_USER_JH7110_ISP_STAT_SETTING:
 		ret = isp_set_ctrl_sc(isp_dev, ctrl->p_new.p_u8);
 		break;
+	case V4L2_CID_USER_JH7110_ISP_OUTSS0_SETTING:
+	case V4L2_CID_USER_JH7110_ISP_OUTSS1_SETTING:
+		ret = isp_set_ctrl_outss(isp_dev, ctrl->p_new.p_u8);
+		break;
 	default:
 		ret = -EINVAL;
 		break;
@@ -1028,6 +1050,30 @@ struct v4l2_ctrl_config isp_ctrl[] = {
 		.dims[0]	= sizeof(struct jh7110_isp_sc_setting),
 		.flags		= 0,
 	},
+	[16] = {
+		.ops		= &isp_ctrl_ops,
+		.type		= V4L2_CTRL_TYPE_U8,
+		.def		= 0,
+		.min		= 0x00,
+		.max		= 0xff,
+		.step		= 1,
+		.name		= "OUTSS Setting",
+		.id		= V4L2_CID_USER_JH7110_ISP_OUTSS0_SETTING,
+		.dims[0]	= sizeof(struct jh7110_isp_outss_setting),
+		.flags		= 0,
+	},
+	[17] = {
+		.ops		= &isp_ctrl_ops,
+		.type		= V4L2_CTRL_TYPE_U8,
+		.def		= 0,
+		.min		= 0x00,
+		.max		= 0xff,
+		.step		= 1,
+		.name		= "OUTSS Setting",
+		.id		= V4L2_CID_USER_JH7110_ISP_OUTSS1_SETTING,
+		.dims[0]	= sizeof(struct jh7110_isp_outss_setting),
+		.flags		= 0,
+	},
 };
 
 static int isp_init_controls(struct stf_isp_dev *isp_dev)
--- a/include/uapi/linux/jh7110-isp.h
+++ b/include/uapi/linux/jh7110-isp.h
@@ -49,6 +49,10 @@
 				(V4L2_CID_USER_JH7110_ISP_BASE + 0x000f)
 #define V4L2_CID_USER_JH7110_ISP_STAT_SETTING \
 				(V4L2_CID_USER_JH7110_ISP_BASE + 0x0010)
+#define V4L2_CID_USER_JH7110_ISP_OUTSS0_SETTING \
+				(V4L2_CID_USER_JH7110_ISP_BASE + 0x0011)
+#define V4L2_CID_USER_JH7110_ISP_OUTSS1_SETTING \
+				(V4L2_CID_USER_JH7110_ISP_BASE + 0x0012)
 
 struct jh7110_isp_wb_gain {
 	__u16 gain_r;
@@ -325,4 +329,23 @@ struct jh7110_isp_sc_setting {
 	struct jh7110_isp_sc_awb_config awb_config;
 };
 
+struct jh7110_isp_outss_setting {
+	__u8 which;
+	__u16 stride;	// Output Image Stride Register, 8-byte(64bit) granularity.
+	__u8 hsm;		// horizontal scale mode
+	__u32 hsf;		// horizontal scale factor (time 4096)
+	__u8 vsm;		// vertical scale mode
+	__u32 vsf;		// vertical scale factor (time 4096)
+};
+
+struct jh7110_isp_sc_buffer {
+	__u32 y_histogram[64];
+	__u32 reserv0[33];
+	__u32 bright_sc[4096];
+	__u32 reserv1[96];
+	__u32 ae_hist_y[128];
+	__u32 reserv2[511];
+	__u16 flag;
+};
+
 #endif