2024-04-10 14:14:32 +00:00
|
|
|
|
From 1ca89c2e349d7c5e045911d741dacf4c83d029e7 Mon Sep 17 00:00:00 2001
|
|
|
|
|
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
|
|
|
|
|
Date: Fri, 1 Mar 2024 12:43:05 +0200
|
|
|
|
|
Subject: [PATCH 27/30] net: dsa: mt7530: simplify link operations
|
|
|
|
|
MIME-Version: 1.0
|
|
|
|
|
Content-Type: text/plain; charset=UTF-8
|
|
|
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
|
|
|
|
|
|
The "MT7621 Giga Switch Programming Guide v0.3", "MT7531 Reference Manual
|
|
|
|
|
for Development Board v1.0", and "MT7988A Wi-Fi 7 Generation Router
|
|
|
|
|
Platform: Datasheet (Open Version) v0.1" documents show that these bits are
|
|
|
|
|
enabled at reset:
|
|
|
|
|
|
|
|
|
|
PMCR_IFG_XMIT(1) (not part of PMCR_LINK_SETTINGS_MASK)
|
|
|
|
|
PMCR_MAC_MODE (not part of PMCR_LINK_SETTINGS_MASK)
|
|
|
|
|
PMCR_TX_EN
|
|
|
|
|
PMCR_RX_EN
|
|
|
|
|
PMCR_BACKOFF_EN (not part of PMCR_LINK_SETTINGS_MASK)
|
|
|
|
|
PMCR_BACKPR_EN (not part of PMCR_LINK_SETTINGS_MASK)
|
|
|
|
|
PMCR_TX_FC_EN
|
|
|
|
|
PMCR_RX_FC_EN
|
|
|
|
|
|
|
|
|
|
These bits also don't exist on the MT7530_PMCR_P(6) register of the switch
|
|
|
|
|
on the MT7988 SoC:
|
|
|
|
|
|
|
|
|
|
PMCR_IFG_XMIT()
|
|
|
|
|
PMCR_MAC_MODE
|
|
|
|
|
PMCR_BACKOFF_EN
|
|
|
|
|
PMCR_BACKPR_EN
|
|
|
|
|
|
|
|
|
|
Remove the setting of the bits not part of PMCR_LINK_SETTINGS_MASK on
|
|
|
|
|
phylink_mac_config as they're already set.
|
|
|
|
|
|
|
|
|
|
The bit for setting the port on force mode is already done on
|
|
|
|
|
mt7530_setup() and mt7531_setup_common(). So get rid of
|
|
|
|
|
PMCR_FORCE_MODE_ID() which helped determine which bit to use for the switch
|
|
|
|
|
model.
|
|
|
|
|
|
|
|
|
|
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
|
|
|
|
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
|
|
|
|
---
|
|
|
|
|
drivers/net/dsa/mt7530.c | 12 +-----------
|
|
|
|
|
drivers/net/dsa/mt7530.h | 2 --
|
|
|
|
|
2 files changed, 1 insertion(+), 13 deletions(-)
|
|
|
|
|
|
|
|
|
|
--- a/drivers/net/dsa/mt7530.c
|
|
|
|
|
+++ b/drivers/net/dsa/mt7530.c
|
2024-04-28 06:25:30 +00:00
|
|
|
|
@@ -2880,23 +2880,13 @@ mt753x_phylink_mac_config(struct dsa_swi
|
2024-04-10 14:14:32 +00:00
|
|
|
|
const struct phylink_link_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct mt7530_priv *priv = ds->priv;
|
|
|
|
|
- u32 mcr_cur, mcr_new;
|
|
|
|
|
|
|
|
|
|
if ((port == 5 || port == 6) && priv->info->mac_port_config)
|
|
|
|
|
priv->info->mac_port_config(ds, port, mode, state->interface);
|
|
|
|
|
|
|
|
|
|
- mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
|
|
|
|
|
- mcr_new = mcr_cur;
|
|
|
|
|
- mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
|
|
|
|
|
- mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN |
|
|
|
|
|
- PMCR_BACKPR_EN | PMCR_FORCE_MODE_ID(priv->id);
|
|
|
|
|
-
|
|
|
|
|
/* Are we connected to external phy */
|
|
|
|
|
if (port == 5 && dsa_is_user_port(ds, 5))
|
|
|
|
|
- mcr_new |= PMCR_EXT_PHY;
|
|
|
|
|
-
|
|
|
|
|
- if (mcr_new != mcr_cur)
|
|
|
|
|
- mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
|
|
|
|
|
+ mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
|
|
|
|
|
--- a/drivers/net/dsa/mt7530.h
|
|
|
|
|
+++ b/drivers/net/dsa/mt7530.h
|
2024-04-28 06:25:30 +00:00
|
|
|
|
@@ -333,8 +333,6 @@ enum mt7530_vlan_port_acc_frm {
|
2024-04-10 14:14:32 +00:00
|
|
|
|
MT7531_FORCE_DPX | \
|
|
|
|
|
MT7531_FORCE_RX_FC | \
|
|
|
|
|
MT7531_FORCE_TX_FC)
|
|
|
|
|
-#define PMCR_FORCE_MODE_ID(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
|
|
|
|
|
- MT7531_FORCE_MODE : PMCR_FORCE_MODE)
|
|
|
|
|
#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
|
|
|
|
|
PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
|
|
|
|
|
PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
|