openwrt/target/linux/gemini/patches-3.10/130-usb-ehci-fot2g.patch

--- a/arch/arm/mach-gemini/devices.c	2011-04-23 01:00:16.738137491 +0200
+++ b/arch/arm/mach-gemini/devices.c	2011-04-23 01:06:55.539299920 +0200
@@ -188,3 +188,64 @@
 
 	return platform_device_register(&ethernet_device);
 }
+
+static struct resource usb0_resources[] = {
+	{
+		.start  = GEMINI_USB0_BASE,
+		.end    = GEMINI_USB0_BASE + 0xfff,
+		.flags  = IORESOURCE_MEM,
+	},
+	{
+		.start  = IRQ_USB0,
+		.end    = IRQ_USB0,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct resource usb1_resources[] = {
+	{
+		.start  = GEMINI_USB1_BASE,
+		.end    = GEMINI_USB1_BASE + 0xfff,
+		.flags  = IORESOURCE_MEM,
+	},
+	{
+		.start  = IRQ_USB1,
+		.end    = IRQ_USB1,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static u64 usb0_dmamask = 0xffffffffUL;
+static u64 usb1_dmamask = 0xffffffffUL;
+
+static struct platform_device usb_device[] = {
+	{
+		.name   = "ehci-fotg2",
+		.id     = 0,
+		.dev    = {
+			.dma_mask = &usb0_dmamask,
+			.coherent_dma_mask = 0xffffffff,
+		},
+		.num_resources  = ARRAY_SIZE(usb0_resources),
+		.resource       = usb0_resources,
+	},
+	{
+		.name   = "ehci-fotg2",
+		.id     = 1,
+		.dev    = {
+			.dma_mask = &usb1_dmamask,
+			.coherent_dma_mask = 0xffffffff,
+		},
+		.num_resources  = ARRAY_SIZE(usb1_resources),
+		.resource       = usb1_resources,
+	},
+};
+
+int __init platform_register_usb(unsigned int id)
+{
+	if (id > 1)
+		return -EINVAL;
+
+	return platform_device_register(&usb_device[id]);
+}
+
--- a/arch/arm/mach-gemini/common.h	2011-04-23 01:09:31.413161153 +0200
+++ b/arch/arm/mach-gemini/common.h	2011-04-23 01:09:52.426358514 +0200
@@ -28,6 +28,7 @@
 				    unsigned int nr_parts);
 extern int platform_register_watchdog(void);
 extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
+extern int platform_register_usb(unsigned int id);
 
 extern void gemini_restart(char mode, const char *cmd);
 
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -39,6 +39,7 @@ config USB_ARCH_HAS_EHCI
 	default y if ARCH_MXC
 	default y if ARCH_MXS
 	default y if ARCH_OMAP3
+	default y if ARCH_GEMINI
 	default y if ARCH_CNS3XXX
 	default y if ARCH_VT8500
 	default y if PLAT_SPEAR
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -340,12 +340,14 @@ static void ehci_silence_controller(struct ehci_hcd *ehci)
 	spin_lock_irq(&ehci->lock);
 	ehci->rh_state = EHCI_RH_HALTED;
 	ehci_turn_off_all_ports(ehci);

+#ifndef CONFIG_ARCH_GEMINI
 	/* make BIOS/etc use companion controller during reboot */
 	ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 
 	/* unblock posted writes */
 	ehci_readl(ehci, &ehci->regs->configured_flag);
+#endif
 	spin_unlock_irq(&ehci->lock);
 }
 
@@ -600,7 +602,9 @@ static int ehci_run (struct usb_hcd *hcd)
 	// Philips, Intel, and maybe others need CMD_RUN before the
 	// root hub will detect new devices (why?); NEC doesn't
 	ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
+#ifndef CONFIG_ARCH_GEMINI
 	ehci->command |= CMD_RUN;
+#endif
 	ehci_writel(ehci, ehci->command, &ehci->regs->command);
 	dbg_cmd (ehci, "init", ehci->command);
 
@@ -620,9 +624,11 @@ static int ehci_run (struct usb_hcd *hcd)
 	 */
 	down_write(&ehci_cf_port_reset_rwsem);
 	ehci->rh_state = EHCI_RH_RUNNING;
+#ifndef CONFIG_ARCH_GEMINI
 	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
 	msleep(5);
+#endif
 	up_write(&ehci_cf_port_reset_rwsem);
 	ehci->last_periodic_enable = ktime_get_real();
 
@@ -763,9 +769,10 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 		pcd_status = status;
 
 		/* resume root hub? */
+#ifndef CONFIG_ARCH_GEMINI
 		if (ehci->rh_state == EHCI_RH_SUSPENDED)
 			usb_hcd_resume_root_hub(hcd);
-
+#endif
 		/* get per-port change detect bits */
 		if (ehci->has_ppcd)
 			ppcd = status >> 16;
@@ -1228,6 +1241,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_AUTHOR (DRIVER_AUTHOR);
 MODULE_LICENSE ("GPL");
 
+#ifdef CONFIG_ARCH_GEMINI
+#include "ehci-fotg2.c"
+#define PLATFORM_DRIVER		ehci_fotg2_driver
+#endif
+
 #ifdef CONFIG_USB_EHCI_FSL
 #include "ehci-fsl.c"
 #define	PLATFORM_DRIVER		ehci_fsl_driver
--- a/drivers/usb/host/ehci-timer.c	2012-12-24 18:35:19.695560879 +0100
+++ b/drivers/usb/host/ehci-timer.c	2012-12-24 18:39:39.813308000 +0100
@@ -207,7 +207,9 @@
 
 	/* Clean up the mess */
 	ehci->rh_state = EHCI_RH_HALTED;
+#ifndef CONFIG_ARCH_GEMINI
 	ehci_writel(ehci, 0, &ehci->regs->configured_flag);
+#endif
 	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 	ehci_work(ehci);
 	end_unlink_async(ehci);
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -600,7 +600,12 @@ static inline unsigned int
 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
 {
 	if (ehci_is_TDI(ehci)) {
-		switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
+#ifdef CONFIG_ARCH_GEMINI
+		portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
+		switch ((portsc>>22)&3) {
+#else
+		switch ((portsc>>26)&3) {
+#endif
 		case 0:
 			return 0;
 		case 1:
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -912,6 +912,11 @@ static int ehci_hub_control (
 			/* see what we found out */
 			temp = check_reset_complete (ehci, wIndex, status_reg,
 					ehci_readl(ehci, status_reg));
+#ifdef CONFIG_ARCH_GEMINI
+			/* restart schedule */
+		 	ehci->command |= CMD_RUN;
+			ehci_writel(ehci, ehci->command, &ehci->regs->command);
+#endif
 		}
 
 		if (!(temp & (PORT_RESUME|PORT_RESET))) {
--- a/include/linux/usb/ehci_def.h	2012-12-24 15:01:10.168320497 +0100
+++ b/include/linux/usb/ehci_def.h	2012-12-24 15:11:43.335575000 +0100
@@ -110,9 +110,14 @@
 	u32		frame_list;	/* points to periodic list */
 	/* ASYNCLISTADDR: offset 0x18 */
 	u32		async_next;	/* address of next async queue head */
-
+#ifndef CONFIG_ARCH_GEMINI
 	u32		reserved1[2];
-
+#else
+	u32		reserved1;
+	/* PORTSC: offset 0x20 for Faraday OTG */
+	u32		port_status[1];
+#endif
+
 	/* TXFILLTUNING: offset 0x24 */
 	u32		txfill_tuning;	/* TX FIFO Tuning register */
 #define TXFIFO_DEFAULT	(8<<16)		/* FIFO burst threshold 8 */
@@ -123,8 +128,11 @@
 	u32		configured_flag;
 #define FLAG_CF		(1<<0)		/* true: we'll support "high speed" */
 
+#ifndef CONFIG_ARCH_GEMINI
 	/* PORTSC: offset 0x44 */
 	u32		port_status[0];	/* up to N_PORTS */
+#endif
+
 /* EHCI 1.1 addendum */
 #define PORTSC_SUSPEND_STS_ACK 0
 #define PORTSC_SUSPEND_STS_NYET 1