mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
70 lines
2.5 KiB
Diff
70 lines
2.5 KiB
Diff
|
From f452518c982e57538e6d49da0a2c80eef22087ab Mon Sep 17 00:00:00 2001
|
||
|
From: Mathias Kresin <dev@kresin.me>
|
||
|
Date: Thu, 22 Mar 2018 23:31:39 +0100
|
||
|
Subject: [PATCH 2/2] net: phy: intel-xway: add VR9 v1.1 phy ids
|
||
|
|
||
|
The phys embedded into the v1.1 of the VR9 SoC are using different phy
|
||
|
ids. Add the phy ids to use the driver for this VR9 version as well.
|
||
|
|
||
|
Signed-off-by: Mathias Kresin <dev@kresin.me>
|
||
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||
|
---
|
||
|
drivers/net/phy/intel-xway.c | 28 ++++++++++++++++++++++++++++
|
||
|
1 file changed, 28 insertions(+)
|
||
|
|
||
|
--- a/drivers/net/phy/intel-xway.c
|
||
|
+++ b/drivers/net/phy/intel-xway.c
|
||
|
@@ -149,6 +149,8 @@
|
||
|
#define PHY_ID_PHY22F_1_4 0xD565A410
|
||
|
#define PHY_ID_PHY11G_1_5 0xD565A401
|
||
|
#define PHY_ID_PHY22F_1_5 0xD565A411
|
||
|
+#define PHY_ID_PHY11G_VR9_1_1 0xD565A408
|
||
|
+#define PHY_ID_PHY22F_VR9_1_1 0xD565A418
|
||
|
#define PHY_ID_PHY11G_VR9_1_2 0xD565A409
|
||
|
#define PHY_ID_PHY22F_VR9_1_2 0xD565A419
|
||
|
|
||
|
@@ -366,6 +368,34 @@ static struct phy_driver xway_gphy[] = {
|
||
|
.suspend = genphy_suspend,
|
||
|
.resume = genphy_resume,
|
||
|
}, {
|
||
|
+ .phy_id = PHY_ID_PHY11G_VR9_1_1,
|
||
|
+ .phy_id_mask = 0xffffffff,
|
||
|
+ .name = "Intel XWAY PHY11G (xRX v1.1 integrated)",
|
||
|
+ .features = PHY_GBIT_FEATURES,
|
||
|
+ .flags = PHY_HAS_INTERRUPT,
|
||
|
+ .config_init = xway_gphy_config_init,
|
||
|
+ .config_aneg = genphy_config_aneg,
|
||
|
+ .read_status = genphy_read_status,
|
||
|
+ .ack_interrupt = xway_gphy_ack_interrupt,
|
||
|
+ .did_interrupt = xway_gphy_did_interrupt,
|
||
|
+ .config_intr = xway_gphy_config_intr,
|
||
|
+ .suspend = genphy_suspend,
|
||
|
+ .resume = genphy_resume,
|
||
|
+ }, {
|
||
|
+ .phy_id = PHY_ID_PHY22F_VR9_1_1,
|
||
|
+ .phy_id_mask = 0xffffffff,
|
||
|
+ .name = "Intel XWAY PHY22F (xRX v1.1 integrated)",
|
||
|
+ .features = PHY_BASIC_FEATURES,
|
||
|
+ .flags = PHY_HAS_INTERRUPT,
|
||
|
+ .config_init = xway_gphy_config_init,
|
||
|
+ .config_aneg = genphy_config_aneg,
|
||
|
+ .read_status = genphy_read_status,
|
||
|
+ .ack_interrupt = xway_gphy_ack_interrupt,
|
||
|
+ .did_interrupt = xway_gphy_did_interrupt,
|
||
|
+ .config_intr = xway_gphy_config_intr,
|
||
|
+ .suspend = genphy_suspend,
|
||
|
+ .resume = genphy_resume,
|
||
|
+ }, {
|
||
|
.phy_id = PHY_ID_PHY11G_VR9_1_2,
|
||
|
.phy_id_mask = 0xffffffff,
|
||
|
.name = "Intel XWAY PHY11G (xRX v1.2 integrated)",
|
||
|
@@ -404,6 +434,8 @@ static struct mdio_device_id __maybe_unu
|
||
|
{ PHY_ID_PHY22F_1_4, 0xffffffff },
|
||
|
{ PHY_ID_PHY11G_1_5, 0xffffffff },
|
||
|
{ PHY_ID_PHY22F_1_5, 0xffffffff },
|
||
|
+ { PHY_ID_PHY11G_VR9_1_1, 0xffffffff },
|
||
|
+ { PHY_ID_PHY22F_VR9_1_1, 0xffffffff },
|
||
|
{ PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
|
||
|
{ PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
|
||
|
{ }
|