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177 lines
6.2 KiB
Diff
177 lines
6.2 KiB
Diff
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From c25c961fc7f36682f0a530150f1b7453ebc344cd Mon Sep 17 00:00:00 2001
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From: Matthias Schiffer <mschiffer@universe-factory.net>
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Date: Tue, 18 Jun 2024 09:17:12 +0200
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Subject: [PATCH 1/2] net: dsa: mt7530: factor out bridge join/leave logic
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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As preparation for implementing bridge port isolation, move the logic to
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add and remove bits in the port matrix into a new helper
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mt7530_update_port_member(), which is called from
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mt7530_port_bridge_join() and mt7530_port_bridge_leave().
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Another part of the preparation is using dsa_port_offloads_bridge_dev()
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instead of dsa_port_offloads_bridge() to check for bridge membership, as
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we don't have a struct dsa_bridge in mt7530_port_bridge_flags().
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The port matrix setting is slightly streamlined, now always first setting
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the mt7530_port's pm field and then writing the port matrix from that
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field into the hardware register, instead of duplicating the bit
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manipulation for both the struct field and the register.
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mt7530_port_bridge_join() was previously using |= to update the port
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matrix with the port bitmap, which was unnecessary, as pm would only
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have the CPU port set before joining a bridge; a simple assignment can
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be used for both joining and leaving (and will also work when individual
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bits are added/removed in port_bitmap with regard to the previous port
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matrix, which is what happens with port isolation).
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No functional change intended.
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Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
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Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
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Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mt7530.c | 105 ++++++++++++++++++---------------------
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1 file changed, 48 insertions(+), 57 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1302,6 +1302,52 @@ mt7530_stp_state_set(struct dsa_switch *
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FID_PST(FID_BRIDGED, stp_state));
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}
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+static void mt7530_update_port_member(struct mt7530_priv *priv, int port,
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+ const struct net_device *bridge_dev,
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+ bool join) __must_hold(&priv->reg_mutex)
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+{
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+ struct dsa_port *dp = dsa_to_port(priv->ds, port), *other_dp;
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+ struct mt7530_port *p = &priv->ports[port], *other_p;
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+ struct dsa_port *cpu_dp = dp->cpu_dp;
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+ u32 port_bitmap = BIT(cpu_dp->index);
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+ int other_port;
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+
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+ dsa_switch_for_each_user_port(other_dp, priv->ds) {
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+ other_port = other_dp->index;
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+ other_p = &priv->ports[other_port];
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+
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+ if (dp == other_dp)
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+ continue;
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+
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+ /* Add/remove this port to/from the port matrix of the other
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+ * ports in the same bridge. If the port is disabled, port
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+ * matrix is kept and not being setup until the port becomes
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+ * enabled.
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+ */
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+ if (!dsa_port_offloads_bridge_dev(other_dp, bridge_dev))
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+ continue;
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+
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+ if (join) {
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+ other_p->pm |= PCR_MATRIX(BIT(port));
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+ port_bitmap |= BIT(other_port);
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+ } else {
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+ other_p->pm &= ~PCR_MATRIX(BIT(port));
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+ }
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+
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+ if (other_p->enable)
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+ mt7530_rmw(priv, MT7530_PCR_P(other_port),
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+ PCR_MATRIX_MASK, other_p->pm);
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+ }
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+
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+ /* Add/remove the all other ports to this port matrix. For !join
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+ * (leaving the bridge), only the CPU port will remain in the port matrix
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+ * of this port.
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+ */
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+ p->pm = PCR_MATRIX(port_bitmap);
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+ if (priv->ports[port].enable)
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+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, p->pm);
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+}
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+
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static int
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mt7530_port_pre_bridge_flags(struct dsa_switch *ds, int port,
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struct switchdev_brport_flags flags,
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@@ -1345,39 +1391,11 @@ mt7530_port_bridge_join(struct dsa_switc
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struct dsa_bridge bridge, bool *tx_fwd_offload,
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struct netlink_ext_ack *extack)
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{
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- struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
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- struct dsa_port *cpu_dp = dp->cpu_dp;
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- u32 port_bitmap = BIT(cpu_dp->index);
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struct mt7530_priv *priv = ds->priv;
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mutex_lock(&priv->reg_mutex);
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- dsa_switch_for_each_user_port(other_dp, ds) {
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- int other_port = other_dp->index;
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-
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- if (dp == other_dp)
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- continue;
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-
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- /* Add this port to the port matrix of the other ports in the
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- * same bridge. If the port is disabled, port matrix is kept
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- * and not being setup until the port becomes enabled.
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- */
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- if (!dsa_port_offloads_bridge(other_dp, &bridge))
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- continue;
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-
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- if (priv->ports[other_port].enable)
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- mt7530_set(priv, MT7530_PCR_P(other_port),
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- PCR_MATRIX(BIT(port)));
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- priv->ports[other_port].pm |= PCR_MATRIX(BIT(port));
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-
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- port_bitmap |= BIT(other_port);
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- }
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-
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- /* Add the all other ports to this port matrix. */
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- if (priv->ports[port].enable)
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- mt7530_rmw(priv, MT7530_PCR_P(port),
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- PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap));
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- priv->ports[port].pm |= PCR_MATRIX(port_bitmap);
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+ mt7530_update_port_member(priv, port, bridge.dev, true);
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/* Set to fallback mode for independent VLAN learning */
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
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@@ -1478,38 +1496,11 @@ static void
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mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
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struct dsa_bridge bridge)
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{
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- struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
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- struct dsa_port *cpu_dp = dp->cpu_dp;
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struct mt7530_priv *priv = ds->priv;
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mutex_lock(&priv->reg_mutex);
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- dsa_switch_for_each_user_port(other_dp, ds) {
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- int other_port = other_dp->index;
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-
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- if (dp == other_dp)
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- continue;
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-
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- /* Remove this port from the port matrix of the other ports
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- * in the same bridge. If the port is disabled, port matrix
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- * is kept and not being setup until the port becomes enabled.
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- */
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- if (!dsa_port_offloads_bridge(other_dp, &bridge))
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- continue;
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-
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- if (priv->ports[other_port].enable)
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- mt7530_clear(priv, MT7530_PCR_P(other_port),
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- PCR_MATRIX(BIT(port)));
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- priv->ports[other_port].pm &= ~PCR_MATRIX(BIT(port));
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- }
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-
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- /* Set the cpu port to be the only one in the port matrix of
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- * this port.
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- */
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- if (priv->ports[port].enable)
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- mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
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- PCR_MATRIX(BIT(cpu_dp->index)));
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- priv->ports[port].pm = PCR_MATRIX(BIT(cpu_dp->index));
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+ mt7530_update_port_member(priv, port, bridge.dev, false);
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/* When a port is removed from the bridge, the port would be set up
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* back to the default as is at initial boot which is a VLAN-unaware
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