2020-03-02 21:24:19 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
|
|
|
|
#include "mt7620a_tplink_re2x0-v1.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
compatible = "tplink,re210-v1", "ralink,mt7620a-soc";
|
|
|
|
model = "TP-Link RE210 v1";
|
|
|
|
|
|
|
|
aliases {
|
|
|
|
led-boot = &led_power;
|
|
|
|
led-failsafe = &led_power;
|
|
|
|
led-running = &led_power;
|
|
|
|
led-upgrade = &led_power;
|
|
|
|
};
|
|
|
|
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
|
|
|
led_power: power {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "green:power";
|
2020-03-02 21:24:19 +00:00
|
|
|
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
rssi_high {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "green:rssi-high";
|
2020-03-02 21:24:19 +00:00
|
|
|
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
rssi_low {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "red:rssi-low";
|
2020-03-02 21:24:19 +00:00
|
|
|
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan2g {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "green:wlan2g";
|
2020-03-02 21:24:19 +00:00
|
|
|
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,default-trigger = "phy1tpt";
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan5g {
|
2020-09-27 17:40:51 +00:00
|
|
|
label = "green:wlan5g";
|
2020-03-02 21:24:19 +00:00
|
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,default-trigger = "phy0tpt";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&keys {
|
|
|
|
led_power {
|
|
|
|
label = "LED power";
|
|
|
|
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,code = <BTN_0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&state_default {
|
|
|
|
gpio {
|
2020-04-12 12:58:29 +00:00
|
|
|
groups = "i2c", "uartf", "wled", "rgmii1";
|
|
|
|
function = "gpio";
|
2020-03-02 21:24:19 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&gsw {
|
2021-03-31 20:09:37 +00:00
|
|
|
mediatek,port4-gmac;
|
2021-04-03 18:42:51 +00:00
|
|
|
mediatek,ephy-base = /bits/ 8 <8>;
|
2020-03-02 21:24:19 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
ðernet {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&rgmii2_pins &mdio_pins>;
|
|
|
|
|
|
|
|
port@4 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
phy-handle = <&phy4>;
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
};
|
|
|
|
|
|
|
|
mdio-bus {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
phy4: ethernet-phy@4 {
|
|
|
|
reg = <4>;
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&gpio1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&gpio3 {
|
|
|
|
status = "okay";
|
|
|
|
};
|