2022-01-10 01:12:45 +00:00
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From 7acd8ef92e8789e10b5d736d73cea3b625087f26 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Wed, 8 Dec 2021 06:07:44 +0100
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Subject: [PATCH] PCI: aardvark: Add support for PME interrupts
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does
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nothing. This is because PCIe PME driver expects to receive PCIe interrupt
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defined in PCI_EXP_FLAGS_IRQ register, but aardvark hardware does not
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trigger PCIe INTx/MSI interrupt for PME event, rather it triggers custom
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aardvark interrupt which this driver is not processing yet.
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Fix this issue by handling PME interrupt in advk_pcie_handle_int() and
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chaining it to PCIe interrupt 0 with generic_handle_domain_irq() (since
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aardvark sets PCI_EXP_FLAGS_IRQ to zero). With this change PCIe PME driver
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finally starts receiving PME interrupt.
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Signed-off-by: Marek Behún <kabel@kernel.org>
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---
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drivers/pci/controller/pci-aardvark.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/drivers/pci/controller/pci-aardvark.c
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+++ b/drivers/pci/controller/pci-aardvark.c
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2022-01-27 12:08:41 +00:00
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@@ -1491,6 +1491,19 @@ static void advk_pcie_handle_int(struct
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2022-01-10 01:12:45 +00:00
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isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
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isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
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+ /* Process PME interrupt */
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+ if (isr0_status & PCIE_MSG_PM_PME_MASK) {
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+ /*
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+ * Do not clear PME interrupt bit in ISR0, it is cleared by IRQ
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+ * receiver by writing to the PCI_EXP_RTSTA register of emulated
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+ * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ,
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+ * so use PCIe interrupt 0.
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+ */
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+ virq = irq_find_mapping(pcie->irq_domain, 0);
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+ if (generic_handle_irq(virq) == -EINVAL)
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+ dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
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+ }
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+
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/* Process ERR interrupt */
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if (isr0_status & PCIE_ISR0_ERR_MASK) {
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advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG);
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