openwrt/target/linux/mediatek/dts/mt7981b-openwrt-one.dts

467 lines
7.9 KiB
Plaintext
Raw Normal View History

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "OpenWrt One";
compatible = "openwrt,one", "mediatek,mt7981";
aliases {
ethernet0 = &gmac1;
label-mac-device = &gmac0;
led-boot = &led_status_white;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
rootdisk = <&ubi_fit_volume>;
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
gpio-keys {
compatible = "gpio-keys";
user {
label = "user";
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
pwm-leds {
compatible = "pwm-leds";
led_status_white: led-0 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
pwms = <&pwm 0 10000>;
linux,default-trigger = "pattern";
led-pattern = <0 500 25 500>;
};
led_status_green: led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
pwms = <&pwm 1 10000>;
};
};
gpio-leds {
compatible = "gpio-leds";
led_status_red: led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
};
led-1 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_AMBER>;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
};
led-2 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
gpio-export {
compatible = "gpio-export";
gpio-0 {
gpio-export,name = "mikrobus-reset";
gpio-export,output = <1>;
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
gpio-1 {
gpio-export,name = "watchdog-enable";
gpio-export,output = <1>;
gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
};
gpio-2 {
gpio-export,name = "usb-enable";
gpio-export,output = <1>;
gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
};
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <25000>;
always-running;
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-handle = <&phy15>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_24>;
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
};
};
&mdio_bus {
phy15: phy@f {
reg = <0xf>;
airoha,pnswap-rx;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <20000>;
phy-mode = "2500base-x";
full-duplex;
pause;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_AMBER>;
};
led@1 {
reg = <1>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
};
};
};
};
&crypto {
status = "okay";
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
spi1_flash_pins: spi1-pins {
mux {
function = "spi";
groups = "spi1_1";
};
conf-pu {
pins = "SPI1_CS";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
spi2_flash_pins: spi2-pins {
mux {
function = "spi";
groups = "spi2";
};
conf-pu {
pins = "SPI2_CS", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
i2c_pins: i2c-pins {
mux {
function = "i2c";
groups = "i2c0_0";
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_0_tx_rx";
};
};
pwm_pins: pwm-pins {
mux {
function = "pwm";
groups = "pwm0_0", "pwm1_1";
};
};
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_pereset";
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
status = "okay";
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
cs-gpios = <0>, <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x100000 0xFF00000>;
compatible = "linux,ubi";
volumes {
ubi_fit_volume: ubi-volume-fit {
volname = "fit";
};
};
};
};
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_flash_pins>;
status = "okay";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_flash_pins>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <52000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2-nor";
reg = <0x00000 0x40000>;
};
partition@40000 {
label = "factory";
reg = <0x40000 0xc0000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
compatible = "mac-base";
};
};
};
partition@100000 {
label = "fip-nor";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "recovery";
reg = <0x180000 0xc80000>;
};
};
};
};
&xhci {
phys = <&u2port0 PHY_TYPE_USB2>;
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
mediatek,u3p-dis-msk = <0x01>;
status = "okay";
};
&uart0 {
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
band@0 {
reg = <0>;
nvmem-cells = <&macaddr_factory_4 0>;
nvmem-cell-names = "mac-address";
};
band@1 {
reg = <1>;
nvmem-cells = <&macaddr_factory_4 1>;
nvmem-cell-names = "mac-address";
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
};
&sgmiisys0 {
/delete-node/ mediatek,pnswap;
};