mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 15:56:49 +00:00
47 lines
1.9 KiB
Diff
47 lines
1.9 KiB
Diff
|
From ad9dc9e92367803a4f9576aea0dab110d03fc510 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Chen-Yu Tsai <wenst@chromium.org>
|
||
|
|
Date: Tue, 28 Mar 2023 11:10:17 +0800
|
||
|
|
Subject: [PATCH 14/42] thermal/drivers/mediatek/lvts_thermal: Fix sensor 1
|
||
|
|
interrupt status bitmask
|
||
|
|
|
||
|
|
The binary representation for sensor 1 interrupt status was incorrectly
|
||
|
|
assembled, when compared to the full table given in the same comment
|
||
|
|
section. The conversion into hex was also incorrect, leading to
|
||
|
|
incorrect interrupt status bitmask for sensor 1. This would cause the
|
||
|
|
driver to incorrectly identify changes for sensor 1, when in fact it
|
||
|
|
was sensor 0, or a sensor access time out.
|
||
|
|
|
||
|
|
Fix the binary and hex representations in the comments, and the actual
|
||
|
|
bitmask macro.
|
||
|
|
|
||
|
|
Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver")
|
||
|
|
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
|
||
|
|
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||
|
|
Link: https://lore.kernel.org/r/20230328031017.1360976-1-wenst@chromium.org
|
||
|
|
---
|
||
|
|
drivers/thermal/mediatek/lvts_thermal.c | 6 +++---
|
||
|
|
1 file changed, 3 insertions(+), 3 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/thermal/mediatek/lvts_thermal.c
|
||
|
|
+++ b/drivers/thermal/mediatek/lvts_thermal.c
|
||
|
|
@@ -66,7 +66,7 @@
|
||
|
|
#define LVTS_MONINT_CONF 0x9FBF7BDE
|
||
|
|
|
||
|
|
#define LVTS_INT_SENSOR0 0x0009001F
|
||
|
|
-#define LVTS_INT_SENSOR1 0X000881F0
|
||
|
|
+#define LVTS_INT_SENSOR1 0x001203E0
|
||
|
|
#define LVTS_INT_SENSOR2 0x00247C00
|
||
|
|
#define LVTS_INT_SENSOR3 0x1FC00000
|
||
|
|
|
||
|
|
@@ -395,8 +395,8 @@ static irqreturn_t lvts_ctrl_irq_handler
|
||
|
|
* => 0x1FC00000
|
||
|
|
* sensor 2 interrupt: 0000 0000 0010 0100 0111 1100 0000 0000
|
||
|
|
* => 0x00247C00
|
||
|
|
- * sensor 1 interrupt: 0000 0000 0001 0001 0000 0011 1110 0000
|
||
|
|
- * => 0X000881F0
|
||
|
|
+ * sensor 1 interrupt: 0000 0000 0001 0010 0000 0011 1110 0000
|
||
|
|
+ * => 0X001203E0
|
||
|
|
* sensor 0 interrupt: 0000 0000 0000 1001 0000 0000 0001 1111
|
||
|
|
* => 0x0009001F
|
||
|
|
*/
|