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50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
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From 74767a3875c99b1a3d2818456a5fdc02ec1e4f93 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
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Date: Thu, 17 Feb 2022 13:54:42 +0100
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Subject: [PATCH 2/3] arm: mvebu: spl: Add option to reset the board on DDR
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training failure
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some boards may occacionally fail DDR training. Currently we hang() in
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this case. Add an option that makes the board do an immediate reset in
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such a case, so that a new training is tried as soon as possible,
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instead of hanging and possibly waiting for watchdog to reset the board.
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(If the DDR training fails while booting the image via UART, we will
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still hang - it doesn't make sense to reset in such a case, because
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after reset the board will try booting from another medium, and the
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UART booting utility does not expect that.)
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Signed-off-by: Marek Behún <marek.behun@nic.cz>
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Reviewed-by: Pali Rohár <pali@kernel.org>
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Reviewed-by: Stefan Roese <sr@denx.de>
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---
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arch/arm/mach-mvebu/spl.c | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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--- a/arch/arm/mach-mvebu/spl.c
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+++ b/arch/arm/mach-mvebu/spl.c
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@@ -4,6 +4,7 @@
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*/
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#include <common.h>
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+#include <cpu_func.h>
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#include <dm.h>
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#include <debug_uart.h>
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#include <fdtdec.h>
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@@ -290,7 +291,11 @@ void board_init_f(ulong dummy)
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ret = ddr3_init();
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if (ret) {
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debug("ddr3_init() failed: %d\n", ret);
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- hang();
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+ if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
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+ get_boot_device() != BOOT_DEVICE_UART)
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+ reset_cpu();
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+ else
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+ hang();
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}
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#endif
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