2018-11-29 08:25:40 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
2018-11-17 07:01:55 +00:00
|
|
|
|
2020-09-25 19:52:57 +00:00
|
|
|
#include "ar9344.dtsi"
|
|
|
|
|
2018-11-17 07:01:55 +00:00
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
|
|
|
|
/ {
|
|
|
|
compatible = "ubnt,xw", "qca,ar9342";
|
|
|
|
model = "Ubiquiti Networks XW board";
|
|
|
|
|
|
|
|
keys {
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
reset {
|
|
|
|
label = "Reset button";
|
|
|
|
linux,code = <KEY_RESTART>;
|
|
|
|
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
|
|
|
debounce-interval = <60>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&ref {
|
|
|
|
clock-frequency = <40000000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&spi {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
flash@0 {
|
|
|
|
compatible = "jedec,spi-nor";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <25000000>;
|
|
|
|
|
|
|
|
partitions {
|
|
|
|
compatible = "fixed-partitions";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
partition@0 {
|
|
|
|
label = "u-boot";
|
|
|
|
reg = <0x000000 0x040000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@40000 {
|
|
|
|
label = "u-boot-env";
|
|
|
|
reg = <0x040000 0x010000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@50000 {
|
2018-11-29 13:07:59 +00:00
|
|
|
compatible = "denx,uimage";
|
2018-11-17 07:01:55 +00:00
|
|
|
label = "firmware";
|
|
|
|
reg = <0x050000 0x760000>;
|
|
|
|
};
|
|
|
|
|
2019-11-18 23:14:38 +00:00
|
|
|
partition@7b0000 {
|
2018-11-17 07:01:55 +00:00
|
|
|
label = "cfg";
|
|
|
|
reg = <0x7b0000 0x040000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
|
2024-02-17 05:17:20 +00:00
|
|
|
partition@7f0000 {
|
2019-11-22 13:42:47 +00:00
|
|
|
label = "art";
|
2018-11-17 07:01:55 +00:00
|
|
|
reg = <0x7f0000 0x010000>;
|
|
|
|
read-only;
|
2023-11-26 03:31:17 +00:00
|
|
|
|
|
|
|
nvmem-layout {
|
|
|
|
compatible = "fixed-layout";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
macaddr_art_0: macaddr@0 {
|
|
|
|
reg = <0x0 0x6>;
|
|
|
|
};
|
2023-12-20 18:27:15 +00:00
|
|
|
|
|
|
|
calibration_art_1000: calibration@1000 {
|
|
|
|
reg = <0x1000 0x440>;
|
|
|
|
};
|
2023-11-26 03:31:17 +00:00
|
|
|
};
|
2018-11-17 07:01:55 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&wmac {
|
|
|
|
status = "okay";
|
|
|
|
|
2023-12-20 18:27:15 +00:00
|
|
|
nvmem-cells = <&calibration_art_1000>;
|
|
|
|
nvmem-cell-names = "calibration";
|
2018-11-17 07:01:55 +00:00
|
|
|
};
|
2018-12-12 19:45:14 +00:00
|
|
|
|
|
|
|
ð0 {
|
2021-04-02 21:47:31 +00:00
|
|
|
nvmem-cells = <&macaddr_art_0>;
|
|
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
};
|