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27 lines
879 B
Diff
27 lines
879 B
Diff
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From 29e4bc0fafd9add93acc967f3992948b3afe7176 Mon Sep 17 00:00:00 2001
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From: Emil Renner Berthing <kernel@esmil.dk>
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Date: Thu, 30 Nov 2023 16:19:27 +0100
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Subject: [PATCH 1018/1024] riscv: dts: starfive: Mark the JH7100 as having
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non-coherent DMAs
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The StarFive JH7100 SoC has non-coherent device DMAs, so mark the
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soc bus as such.
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Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Cache%20Coherence%20V1.0.pdf
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Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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---
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arch/riscv/boot/dts/starfive/jh7100.dtsi | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
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+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
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@@ -138,6 +138,7 @@
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interrupt-parent = <&plic>;
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#address-cells = <2>;
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#size-cells = <2>;
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+ dma-noncoherent;
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ranges;
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clint: clint@2000000 {
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