2019-07-10 10:29:03 +00:00
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From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
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From: Mathias Kresin <dev@kresin.me>
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Date: Sun, 7 Jul 2019 21:45:51 +0200
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Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
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Switch back to the former used names, to make the legacy switch driver
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happy.
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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---
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arch/mips/lantiq/xway/sysctrl.c | 14 +++++++-------
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1 file changed, 7 insertions(+), 7 deletions(-)
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--- a/arch/mips/lantiq/xway/sysctrl.c
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+++ b/arch/mips/lantiq/xway/sysctrl.c
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@@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
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clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
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clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
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clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
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- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
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+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
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clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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} else if (of_machine_is_compatible("lantiq,ar10")) {
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@@ -511,11 +511,11 @@ void __init ltq_soc_init(void)
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ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
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clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
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clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
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- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
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+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
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PMU_PPE_DP | PMU_PPE_TC);
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clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
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2020-07-09 21:22:35 +00:00
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- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
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- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
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2019-07-10 10:29:03 +00:00
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+ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
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+ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
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clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
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@@ -534,12 +534,12 @@ void __init ltq_soc_init(void)
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clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
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clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
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- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
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+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
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PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
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PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
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PMU_PPE_QSB | PMU_PPE_TOP);
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2020-07-09 21:22:35 +00:00
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- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
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- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
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2019-07-10 10:29:03 +00:00
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+ clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
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+ clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
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clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
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