2021-03-17 17:36:54 +00:00
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--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
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2021-08-28 11:40:00 +00:00
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@@ -297,14 +297,14 @@
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2021-03-17 17:36:54 +00:00
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&pcie1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_pins>;
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- status = "okay";
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+ status = "disabled";
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};
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&pio {
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/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
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* SATA functions. i.e. output-high: PCIe, output-low: SATA
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*/
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- asm_sel {
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+ asmsel: asm_sel {
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gpio-hog;
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gpios = <90 GPIO_ACTIVE_HIGH>;
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output-high;
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--- /dev/null
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-sata.dts
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@@ -0,0 +1,31 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "bananapi,bpi-r64", "mediatek,mt7622";
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+
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+ fragment@0 {
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+ target = <&asmsel>;
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+ __overlay__ {
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+ gpios = <90 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&sata>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&sata_phy>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-pcie1.dts
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@@ -0,0 +1,24 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "bananapi,bpi-r64", "mediatek,mt7622";
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+
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+ fragment@0 {
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+ target = <&asmsel>;
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+ __overlay__ {
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+ gpios = <90 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&pcie1>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+};
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