2018-04-29 14:38:07 +00:00
|
|
|
From 9d3b968d13ba1eecaf22d5824cf8fd270c061534 Mon Sep 17 00:00:00 2001
|
|
|
|
From: Linus Walleij <linus.walleij@linaro.org>
|
|
|
|
Date: Sat, 15 Jul 2017 21:02:06 +0200
|
|
|
|
Subject: [PATCH 16/31] ARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685
|
|
|
|
|
|
|
|
This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel
|
|
|
|
to the DIR-685 device tree.
|
|
|
|
|
|
|
|
This brings graphics to this funky router and it is possible to
|
|
|
|
even run a console on its tiny screen.
|
|
|
|
|
|
|
|
Incidentally this requires us to disable the access to the
|
|
|
|
parallel (NOR) flash, as the communication pins to the panel
|
|
|
|
are shared with the flash memory.
|
|
|
|
|
|
|
|
To access the flash, a separate kernel with the panel disabled
|
|
|
|
and the flash enabled should be booted. The pin control selecting
|
|
|
|
whether to use the lines cannot be altered at runtime due to
|
|
|
|
hardware constraints.
|
|
|
|
|
|
|
|
Cc: David Lechner <david@lechnology.com>
|
|
|
|
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
|
|
|
|
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
|
|
---
|
|
|
|
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 63 +++++++++++++++++++++++++++++-
|
|
|
|
1 file changed, 62 insertions(+), 1 deletion(-)
|
|
|
|
|
|
|
|
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
|
|
|
|
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
|
|
|
|
@@ -45,6 +45,47 @@
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
+ vdisp: regulator {
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
+ regulator-name = "display-power";
|
|
|
|
+ regulator-min-microvolt = <3600000>;
|
|
|
|
+ regulator-max-microvolt = <3600000>;
|
|
|
|
+ /* Collides with LCD E */
|
|
|
|
+ gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ enable-active-high;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ spi {
|
|
|
|
+ compatible = "spi-gpio";
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
+
|
|
|
|
+ /* Collides with IDE pins, that's cool (we do not use them) */
|
|
|
|
+ gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ /* Collides with pflash CE1, not so cool */
|
|
|
|
+ cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
|
|
|
|
+ num-chipselects = <1>;
|
|
|
|
+
|
|
|
|
+ panel: display@0 {
|
|
|
|
+ compatible = "dlink,dir-685-panel", "ilitek,ili9322";
|
|
|
|
+ reg = <0>;
|
|
|
|
+ /* 50 ns min period = 20 MHz */
|
|
|
|
+ spi-max-frequency = <20000000>;
|
|
|
|
+ spi-cpol; /* Clock active low */
|
|
|
|
+ vcc-supply = <&vdisp>;
|
|
|
|
+ iovcc-supply = <&vdisp>;
|
|
|
|
+ vci-supply = <&vdisp>;
|
|
|
|
+
|
|
|
|
+ port {
|
|
|
|
+ panel_in: endpoint {
|
|
|
|
+ remote-endpoint = <&display_out>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
led-wps {
|
|
|
|
@@ -115,7 +156,16 @@
|
|
|
|
|
|
|
|
soc {
|
|
|
|
flash@30000000 {
|
|
|
|
- status = "okay";
|
|
|
|
+ /*
|
|
|
|
+ * Flash access is by default disabled, because it
|
|
|
|
+ * collides with the Chip Enable signal for the display
|
|
|
|
+ * panel, that reuse the parallel flash Chip Select 1
|
|
|
|
+ * (CS1). Enabling flash makes graphics stop working.
|
|
|
|
+ *
|
|
|
|
+ * We might be able to hack around this by letting
|
|
|
|
+ * GPIO poke around in the flash controller registers.
|
|
|
|
+ */
|
|
|
|
+ /* status = "okay"; */
|
|
|
|
/* 32MB of flash */
|
|
|
|
reg = <0x30000000 0x02000000>;
|
|
|
|
|
2019-02-13 10:30:07 +00:00
|
|
|
@@ -238,5 +288,16 @@
|
2018-04-29 14:38:07 +00:00
|
|
|
ata@63000000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
+
|
|
|
|
+ display-controller@6a000000 {
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
|
|
|
+ port@0 {
|
|
|
|
+ reg = <0>;
|
|
|
|
+ display_out: endpoint {
|
|
|
|
+ remote-endpoint = <&panel_in>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
};
|
|
|
|
};
|