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https://github.com/openwrt/openwrt.git
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140 lines
3.9 KiB
Diff
140 lines
3.9 KiB
Diff
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From a2479dc254ebe31c84fbcfda73f35e2321576494 Mon Sep 17 00:00:00 2001
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From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
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Date: Tue, 19 Mar 2019 13:57:38 +0800
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Subject: [PATCH 1/6] mtd: mtk ecc: move mtk ecc header file to include/mtd
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Change-Id: I8dc1d30e21b40d68ef5efd9587012f82970156a5
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Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
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---
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drivers/mtd/nand/raw/mtk_ecc.c | 3 +--
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drivers/mtd/nand/raw/mtk_nand.c | 2 +-
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{drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h | 0
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3 files changed, 2 insertions(+), 3 deletions(-)
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rename {drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h (100%)
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--- a/drivers/mtd/nand/raw/mtk_ecc.c
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+++ b/drivers/mtd/nand/raw/mtk_ecc.c
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@@ -15,8 +15,7 @@
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/mutex.h>
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-
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-#include "mtk_ecc.h"
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+#include <linux/mtd/mtk_ecc.h>
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#define ECC_IDLE_MASK BIT(0)
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#define ECC_IRQ_EN BIT(0)
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--- a/drivers/mtd/nand/raw/mtk_nand.c
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+++ b/drivers/mtd/nand/raw/mtk_nand.c
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@@ -17,7 +17,7 @@
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#include <linux/iopoll.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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-#include "mtk_ecc.h"
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+#include <linux/mtd/mtk_ecc.h>
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/* NAND controller register definition */
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#define NFI_CNFG (0x00)
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--- /dev/null
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+++ b/include/linux/mtd/mtk_ecc.h
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@@ -0,0 +1,49 @@
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+/*
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+ * MTK SDG1 ECC controller
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+ *
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+ * Copyright (c) 2016 Mediatek
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+ * Authors: Xiaolei Li <xiaolei.li@mediatek.com>
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+ * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
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+#define __DRIVERS_MTD_NAND_MTK_ECC_H__
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+
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+#include <linux/types.h>
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+
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+enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
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+enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
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+
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+struct device_node;
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+struct mtk_ecc;
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+
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+struct mtk_ecc_stats {
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+ u32 corrected;
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+ u32 bitflips;
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+ u32 failed;
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+};
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+
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+struct mtk_ecc_config {
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+ enum mtk_ecc_operation op;
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+ enum mtk_ecc_mode mode;
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+ dma_addr_t addr;
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+ u32 strength;
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+ u32 sectors;
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+ u32 len;
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+};
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+
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+int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
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+void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
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+int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
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+int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
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+void mtk_ecc_disable(struct mtk_ecc *);
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+void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
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+unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
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+
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+struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
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+void mtk_ecc_release(struct mtk_ecc *);
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+
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+#endif
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--- a/drivers/mtd/nand/raw/mtk_ecc.h
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+++ /dev/null
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@@ -1,47 +0,0 @@
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-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
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-/*
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- * MTK SDG1 ECC controller
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- *
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- * Copyright (c) 2016 Mediatek
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- * Authors: Xiaolei Li <xiaolei.li@mediatek.com>
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- * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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- */
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-
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-#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
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-#define __DRIVERS_MTD_NAND_MTK_ECC_H__
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-
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-#include <linux/types.h>
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-
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-enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
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-enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
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-
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-struct device_node;
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-struct mtk_ecc;
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-
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-struct mtk_ecc_stats {
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- u32 corrected;
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- u32 bitflips;
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- u32 failed;
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-};
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-
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-struct mtk_ecc_config {
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- enum mtk_ecc_operation op;
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- enum mtk_ecc_mode mode;
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- dma_addr_t addr;
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- u32 strength;
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- u32 sectors;
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- u32 len;
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-};
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-
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-int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
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-void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
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-int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
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-int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
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-void mtk_ecc_disable(struct mtk_ecc *);
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-void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
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-unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
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-
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-struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
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-void mtk_ecc_release(struct mtk_ecc *);
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-
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-#endif
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