mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 08:51:13 +00:00
411 lines
12 KiB
Diff
411 lines
12 KiB
Diff
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--- a/drivers/net/wireless/ath/ath.h
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+++ b/drivers/net/wireless/ath/ath.h
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@@ -102,14 +102,12 @@ enum ath_cipher {
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* @read: Register read
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* @write: Register write
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* @enable_write_buffer: Enable multiple register writes
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- * @disable_write_buffer: Disable multiple register writes
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- * @write_flush: Flush buffered register writes
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+ * @write_flush: flush buffered register writes and disable buffering
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*/
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struct ath_ops {
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unsigned int (*read)(void *, u32 reg_offset);
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void (*write)(void *, u32 val, u32 reg_offset);
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void (*enable_write_buffer)(void *);
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- void (*disable_write_buffer)(void *);
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void (*write_flush) (void *);
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};
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--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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@@ -380,15 +380,6 @@ static void ath9k_enable_regwrite_buffer
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atomic_inc(&priv->wmi->mwrite_cnt);
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}
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-static void ath9k_disable_regwrite_buffer(void *hw_priv)
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-{
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- struct ath_hw *ah = (struct ath_hw *) hw_priv;
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- struct ath_common *common = ath9k_hw_common(ah);
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- struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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-
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- atomic_dec(&priv->wmi->mwrite_cnt);
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-}
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-
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static void ath9k_regwrite_flush(void *hw_priv)
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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@@ -397,6 +388,9 @@ static void ath9k_regwrite_flush(void *h
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u32 rsp_status;
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int r;
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+ if (!atomic_dec_and_test(&priv->wmi->mwrite_cnt))
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+ return;
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+
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mutex_lock(&priv->wmi->multi_write_mutex);
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if (priv->wmi->multi_write_idx) {
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@@ -420,7 +414,6 @@ static const struct ath_ops ath9k_common
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.read = ath9k_regread,
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.write = ath9k_regwrite,
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.enable_write_buffer = ath9k_enable_regwrite_buffer,
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- .disable_write_buffer = ath9k_disable_regwrite_buffer,
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.write_flush = ath9k_regwrite_flush,
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};
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--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -70,19 +70,13 @@
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#define ENABLE_REGWRITE_BUFFER(_ah) \
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do { \
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- if (AR_SREV_9271(_ah)) \
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+ if (ath9k_hw_common(_ah)->ops->enable_write_buffer) \
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ath9k_hw_common(_ah)->ops->enable_write_buffer((_ah)); \
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} while (0)
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-#define DISABLE_REGWRITE_BUFFER(_ah) \
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- do { \
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- if (AR_SREV_9271(_ah)) \
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- ath9k_hw_common(_ah)->ops->disable_write_buffer((_ah)); \
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- } while (0)
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-
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#define REGWRITE_BUFFER_FLUSH(_ah) \
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do { \
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- if (AR_SREV_9271(_ah)) \
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+ if (ath9k_hw_common(_ah)->ops->write_flush) \
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ath9k_hw_common(_ah)->ops->write_flush((_ah)); \
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} while (0)
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--- a/drivers/net/wireless/ath/ath9k/ani.c
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+++ b/drivers/net/wireless/ath/ath9k/ani.c
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@@ -180,7 +180,6 @@ static void ath9k_ani_restart_old(struct
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REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
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@@ -215,7 +214,6 @@ static void ath9k_ani_restart_new(struct
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REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
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@@ -643,7 +641,6 @@ static void ath9k_ani_reset_old(struct a
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REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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/*
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@@ -737,7 +734,6 @@ static void ath9k_ani_reset_new(struct a
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REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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static void ath9k_hw_ani_monitor_old(struct ath_hw *ah,
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@@ -991,7 +987,6 @@ void ath9k_enable_mib_counters(struct at
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REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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/* Freeze the MIB counters, get the stats and then clear them */
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@@ -1261,7 +1256,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
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REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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ath9k_enable_mib_counters(ah);
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--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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@@ -615,14 +615,11 @@ static void ar5008_hw_init_chain_masks(s
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rx_chainmask = ah->rxchainmask;
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tx_chainmask = ah->txchainmask;
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- ENABLE_REGWRITE_BUFFER(ah);
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switch (rx_chainmask) {
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case 0x5:
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- DISABLE_REGWRITE_BUFFER(ah);
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REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
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AR_PHY_SWAP_ALT_CHAIN);
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- ENABLE_REGWRITE_BUFFER(ah);
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case 0x3:
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if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
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REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
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@@ -632,17 +629,18 @@ static void ar5008_hw_init_chain_masks(s
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case 0x1:
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case 0x2:
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case 0x7:
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+ ENABLE_REGWRITE_BUFFER(ah);
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REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
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REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
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break;
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default:
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+ ENABLE_REGWRITE_BUFFER(ah);
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break;
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}
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REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (tx_chainmask == 0x5) {
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REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
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@@ -728,7 +726,6 @@ static void ar5008_hw_set_channel_regs(s
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REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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@@ -820,7 +817,6 @@ static int ar5008_hw_process_ini(struct
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (AR_SREV_9280(ah) || AR_SREV_9287_11_OR_LATER(ah))
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REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
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@@ -851,7 +847,6 @@ static int ar5008_hw_process_ini(struct
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (AR_SREV_9271(ah)) {
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if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)
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--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
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@@ -522,7 +522,6 @@ static void ar9271_hw_pa_cal(struct ath_
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REG_WRITE(ah, regList[i][0], regList[i][1]);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset)
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--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
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@@ -371,7 +371,6 @@ static void ar9002_hw_configpcipowersave
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REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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udelay(1000);
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@@ -468,7 +467,6 @@ static int ar9002_hw_get_radiorev(struct
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REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
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val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
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@@ -627,6 +625,4 @@ void ar9002_hw_load_ani_reg(struct ath_h
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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-
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}
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--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
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@@ -415,7 +415,6 @@ static void ar9002_hw_spur_mitigate(stru
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REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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static void ar9002_olc_init(struct ath_hw *ah)
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--- a/drivers/net/wireless/ath/ath9k/calib.c
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+++ b/drivers/net/wireless/ath/ath9k/calib.c
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@@ -300,7 +300,6 @@ void ath9k_hw_loadnf(struct ath_hw *ah,
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}
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
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+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
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@@ -500,7 +500,6 @@ static void ath9k_hw_set_4k_power_cal_ta
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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}
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@@ -832,7 +831,6 @@ static void ath9k_hw_4k_set_txpower(stru
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -302,7 +302,6 @@ static void ath9k_hw_disablepcie(struct
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REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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/* This should work for all families including legacy */
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@@ -688,7 +687,6 @@ static void ath9k_hw_init_qos(struct ath
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REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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}
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static void ath9k_hw_init_pll(struct ath_hw *ah,
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@@ -753,7 +751,6 @@ static void ath9k_hw_init_interrupt_mask
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0);
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@@ -897,7 +894,6 @@ static inline void ath9k_hw_set_dma(stru
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REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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/*
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* Restore TX Trigger Level to its pre-reset value.
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@@ -945,7 +941,6 @@ static inline void ath9k_hw_set_dma(stru
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}
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (AR_SREV_9300_20_OR_LATER(ah))
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ath9k_hw_reset_txstatus_ring(ah);
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@@ -1043,7 +1038,6 @@ static bool ath9k_hw_set_reset(struct at
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REG_WRITE(ah, AR_RTC_RC, rst_flags);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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udelay(50);
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@@ -1082,7 +1076,6 @@ static bool ath9k_hw_set_reset_power_on(
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udelay(2);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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if (!AR_SREV_9300_20_OR_LATER(ah))
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udelay(2);
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@@ -1386,7 +1379,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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r = ath9k_hw_rf_set_freq(ah, chan);
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if (r)
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@@ -1398,7 +1390,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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ah->intr_txqs = 0;
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for (i = 0; i < ah->caps.total_queues; i++)
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@@ -1446,7 +1437,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ);
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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/*
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* For big endian systems turn on swapping for descriptors
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@@ -1696,7 +1686,6 @@ void ath9k_hw_beaconinit(struct ath_hw *
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REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period));
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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beacon_period &= ~ATH9K_BEACON_ENA;
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if (beacon_period & ATH9K_BEACON_RESET_TSF) {
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@@ -1724,7 +1713,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
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TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD));
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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REG_RMW_FIELD(ah, AR_RSSI_THR,
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AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
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@@ -1770,7 +1758,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
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REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
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REGWRITE_BUFFER_FLUSH(ah);
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- DISABLE_REGWRITE_BUFFER(ah);
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REG_SET_BIT(ah, AR_TIMER_MODE,
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AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
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@@ -2188,7 +2175,6 @@ void ath9k_hw_setrxfilter(struct ath_hw
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||
|
REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);
|
||
|
|
||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||
|
- DISABLE_REGWRITE_BUFFER(ah);
|
||
|
}
|
||
|
EXPORT_SYMBOL(ath9k_hw_setrxfilter);
|
||
|
|
||
|
--- a/drivers/net/wireless/ath/ath9k/mac.c
|
||
|
+++ b/drivers/net/wireless/ath/ath9k/mac.c
|
||
|
@@ -40,7 +40,6 @@ static void ath9k_hw_set_txq_interrupts(
|
||
|
REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg);
|
||
|
|
||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||
|
- DISABLE_REGWRITE_BUFFER(ah);
|
||
|
}
|
||
|
|
||
|
u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q)
|
||
|
@@ -530,7 +529,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
|
||
|
}
|
||
|
|
||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||
|
- DISABLE_REGWRITE_BUFFER(ah);
|
||
|
|
||
|
if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) {
|
||
|
REG_WRITE(ah, AR_DMISC(q),
|
||
|
@@ -553,7 +551,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
|
||
|
| AR_D_MISC_POST_FR_BKOFF_DIS);
|
||
|
|
||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||
|
- DISABLE_REGWRITE_BUFFER(ah);
|
||
|
|
||
|
/*
|
||
|
* cwmin and cwmax should be 0 for beacon queue
|
||
|
@@ -585,7 +582,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
|
||
|
AR_D_MISC_ARB_LOCKOUT_CNTRL_S));
|
||
|
|
||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||
|
- DISABLE_REGWRITE_BUFFER(ah);
|
||
|
|
||
|
break;
|
||
|
case ATH9K_TX_QUEUE_PSPOLL:
|